74LVC1G175GM 데이터 시트보기 (PDF) - Philips Electronics

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74LVC1G175GM

Single D-type flip-flop with reset; positive-edge trigger

Philips Electronics 

Philips Semiconductors

74LVC1G175

Single D-type flip-flop with reset; positive-edge trigger

VI

MR input

GND

VI

CP input

GND

VOH

Q output

VOL

VM

tW

t rem

t PHL

VM

VM

001aaa464

Fig 7.

Measurement points are given in Table 9.

VOL and VOH are typical output voltage drop that occur with the output load.

The master reset (MR) input to output (Q) propagation delays, the master reset

pulse width and the MR to CP removal time.

VCC

VI

PULSE

GENERATOR

VO

D.U.T.

RT

VEXT

RL

CL

RL

mna616

Test data is given in Table 10.

Definitions for test circuit:

RL = Load resistor.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to the output impedance Zo of the pulse

generator.

Fig 8. Load circuitry for switching times.

Table 10: Test data

Supply voltage Input

VCC

1.65 V to 1.95 V

2.3 V to 2.7 V

2.7 V

VI

VCC

VCC

2.7 V

3.0 V to 3.6 V 2.7 V

4.5 V to 5.5 V VCC

Load

CL

30 pF

30 pF

50 pF

50 pF

50 pF

RL

1 kΩ

500 Ω

500 Ω

500 Ω

500 Ω

VEXT

tPLH, tPHL

open

open

open

open

open

tPZH, tPHZ

GND

GND

GND

GND

GND

tPZL, tPLZ

2 × VCC

2 × VCC

6V

6V

2 × VCC

9397 750 13762

Product data sheet

Rev. 01 — 18 October 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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