74LVC27 데이터 시트보기 (PDF) - Philips Electronics
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74LVC27 Datasheet PDF : 10 Pages
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Philips Semiconductors
Triple 3-input NOR gate
Product specification
74LVC27
FEATURES
• Wide supply voltage: 1.2 to 3.6 V
• In accordance with JEDEC standard no. 8-1A.
• Inputs accept voltages up to 5.5 V
• CMOS low power consumption
• Direct interface with TTL levels
• Output capability: standard
• ICC category: SSI
DESCRIPTION
The 74LVC27 is a high-performance, low-power, low-voltage Si-gate
CMOS device and superior to most advanced CMOS compatible
TTL families.
The 74LVC27 provides the 3-input NOR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
Propagation delay
nA, nB, nC to nY
CL = 50 pF;
VCC = 3.3 V
CI
Input capacitance
CPD
Power dissipation capacitance per gate Notes 1 and 2
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi )ȍ (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
ȍ (CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC.
TYPICAL
3.4
5.0
26
ORDERING INFORMATION
PACKAGES
14-Pin Plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74LVC27 D
74LVC27 DB
74LVC27 PW
NORTH AMERICA
74LVC27 D
74LVC27 DB
74LVC27PW DH
UNIT
ns
pF
pF
DWG NUMBER
SOT108-1
SOT337-1
SOT402-1
PIN CONFIGURATION
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 V CC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
SV00446
LOGIC SYMBOL (IEEE/IEC)
1
≥1
2
12
13
3
≥1
4
6
5
9
≥1
10
8
11
SV00448
1998 Apr 28
2
853-2056 19309
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