N28F020-90 데이터 시트보기 (PDF) - Intel
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N28F020-90 Datasheet PDF : 29 Pages
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28F020
Bus
Operation
Command
Comments
Standby
Wait for VPP Ramp to VPPH(1)
Initialize Pulse-Count
Write
Write
Set-up
Program
Program
Data e 40H
Valid Address Data
Standby
Write
Standby
Read
Program(2)
Verify
Duration of Program
Operation (tWHWH1)
Data e C0H Stops Program
Operation(3)
tWHGL
Read Byte to Verify
Programming
Standby
Compare Data Output to Data
Expected
Write
Read
Standby
Data e 00H Resets the
Register for Read Operations
Wait for VPP Ramp to VPPL(1)
290245 – 7
NOTES
1 See DC Characteristics for the value of VPPH and
VPPL
2 Program Verify is only performed after byte program-
ming A final read compare may be performed (option-
al) after the register is written with the Read command
3 Refer to principles of operation
4 CAUTION The algorithm MUST BE FOLLOWED
to ensure proper and reliable operation of the de-
vice
Figure 5 28F020 Quick-Pulse Programming Algorithm
11
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