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TTSI2K32T 데이터 시트보기 (PDF) - Agere -> LSI Corporation

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TTSI2K32T
Agere
Agere -> LSI Corporation Agere
TTSI2K32T Datasheet PDF : 66 Pages
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Preliminary Data Sheet
February 1999
TTSI2K32T
2048-Channel, 32-Highway Time-Slot Interchanger
Functional Description
The TTSI2K32T is a 2048 time-slot switch that can be used in a variety of ways, with some or all of the highways
active and running at different data rates. The table below lists a few of the possible combinations of switch size
and data rates. By selecting different rates for receive and transmit highways, rate adaptation can be performed
also. Each one of the 64 (32 transmit and 32 receive) highways can be independently programmed for data rate
(2.048 Mbits/s, 4.096 Mbits/s, or 8.192 Mbits/s) as well as a full range of bit (0—7.75) and byte (0—127) offsets.
Table 1. Data Rate and Switch Size Examples
Number of
Receive
Highways
Used
32
16
16
16
and 8
Receive
Receive
Highway Data Time Slots
Rates (Mbits/s) per Frame
4.096
64
8.192
128
8.192
128
4.096
64
8.192
128
Total
Switch
Size
2048
2048
2048
2048
Number of
Transmit
Highways
Used
32
16
32
10
and 11
Transmit
Transmit
Highway Data Time Slots
Rates (Mbits/s) per Frame
4.096
64
8.192
128
4.096
64
4.096
64
8.192
128
This device uses a single clock (CK) and frame synchronization (FSYNC) signal for all highways. The CK rate can
be 2.048 MHz, 4.096 MHz, 8.192 MHz, or 16.384 MHz, and this speed is indicated to the device via the CKSPD
[0—2] strap pins. A pulse is expected on the FSYNC pin once every 125 µs.
Each one of the 2048 time slots can be independently programmed in any one of the data modes listed below:
s Low latency
s Frame integrity
s Host data substitution
s Idle code substitution
s Test-pattern substitution (PRBS, QRSS, or a fixed byte)
s High impedance
The low-latency mode causes a receive highway time slot to be transmitted as soon as possible, which is depen-
dent on the relative offset of the input and output time slots. This mode is useful for voice channels where it is
important to keep the transmission delay to a minimum.
The frame integrity mode will guarantee that all selected time slots received in a common frame will be transmitted
together in a common frame. This mode is useful for wideband data (e.g., ISDN H-channels) where multiple time
slots received in a single frame cannot be split across two transmit frames.
The TTSI2K32T is a nonblocking DS0 (64 kbits/s channel) switch where a time slot is 8 bits. Since each Rx and Tx
highway data rate can be individually selected, the TTSI2K32T can also be used to switch time slots that are
smaller than 8 bits.
s 32 kbits/s channels (4-bit time slots) such as in compressed voice (ADPCM) applications. The TTSI2K32T will
be configured to sample the data at twice the data rate for highways carrying traffic at 2.048 Mbits/s or
4.096 Mbits/s.
s 16 kbits/s channels (2-bit time slots) such as in cellular (GSM) applications. The TTSI2K32T will be set to sample
the data at four times the data rate on a 2.048 Mbits/s highway carrying such traffic.
s 8 kbits/s channels (1-bit time slots) such as in half-rate GSM applications. This can be done by looping the data
through the TSI multiple times, thus oversampling the same data multiple times. However, in this configuration,
the total switching capacity of the device will drop and the latency will go up.
The TTSI2K32T is one in a family of 1K, 2K, and 4K TSIs. The high-impedance control per time-slot feature allows
four of the 4K devices to be connected to make an 8K time-slot switch.
If external drivers are needed on the transmit highway pins, support for 32 output enables, corresponding to the 32
transmit highways, is provided.
Lucent Technologies Inc.
5

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