74LVX574(2004) 데이터 시트보기 (PDF) - STMicroelectronics

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74LVX574
(Rev.:2004)

LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP (3-STATE NON INV.) WITH 5V TOLERANT INPUTS

STMicroelectronics 

74LVX574

Figure 2: Input Equivalent Circuit

Table 3: Truth Table

OE

H

L

L

L

X : Don’t Care

Z : High Impedance

Figure 3: Logic Diagram

INPUTS

CK

X

Table 2: Pin Description

PIN N°

1

2, 3, 4, 5, 6,

7, 8, 9

12, 13, 14,

15, 16, 17,

18, 19

11

10

20

SYMBOL

OE

D0 to D7

NAME AND FUNCTION

3-State Output Enable

Input (Active LOW)

Data Inputs

Q0 to Q7 3-State Outputs

CK

GND

VCC

Clock Input (LOW-to-HIGH

Edge Triggered)

Ground (0V)

Positive Supply Voltage

OUTPUT

D

Q

X

Z

X

NO CHANGE

L

L

H

H

This logic diagram has not be used to estimate propagation delays

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