82845G 데이터 시트보기 (PDF) - Intel
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82845G Datasheet PDF : 193 Pages
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3.5.3
3.5.4
3.5.2.9 HDR1—Header Type Register (Device 1).........................83
3.5.2.10 PBUSN1—Primary Bus Number Register (Device 1) .......83
3.5.2.11 SBUSN1—Secondary Bus Number Register (Device 1)...84
3.5.2.12 SUBUSN1—Subordinate Bus Number Register (Device 1)..
84
3.5.2.13 SMLT1—Secondary Bus Master Latency Timer Register
(Device 1).............................................................................84
3.5.2.14 IOBASE1—I/O Base Address Register (Device 1)............85
3.5.2.15 IOLIMIT1—I/O Limit Address Register (Device 1).............85
3.5.2.16 SSTS1—Secondary Status Register (Device 1) ...............86
3.5.2.17 MBASE1—Memory Base Address Register (Device 1) ....87
3.5.2.18 MLIMIT1—Memory Limit Address Register (Device 1) .....88
3.5.2.19 PMBASE1—Prefetchable Memory Base Address Register
(Device 1).............................................................................89
3.5.2.20 PMLIMIT1—Prefetchable Memory Limit Address Register
(Device 1).............................................................................89
3.5.2.21 BCTRL1—Bridge Control Register (Device 1) ..................90
3.5.2.22 ERRCMD1—Error Command Register (Device 1)............91
Integrated Graphics Device Registers (Device 2) .............................92
3.5.3.1 VID2—Vendor Identification Register (Device 2) ..............93
3.5.3.2 DID2—Device Identification Register (Device 2)...............93
3.5.3.3 PCICMD2—PCI Command Register (Device 2) ...............94
3.5.3.4 PCISTS2—PCI Status Register (Device 2) .......................95
3.5.3.5 RID2—Revision Identification Register (Device 2) ............95
3.5.3.6 CC—Class Code Register (Device 2) ...............................96
3.5.3.7 CLS—Cache Line Size Register (Device 2) ......................96
3.5.3.8 MLT2—Master Latency Timer Register (Device 2) ...........96
3.5.3.9 HDR2—Header Type Register (Device 2).........................97
3.5.3.10 GMADR —Graphics Memory Range Address Register
(Device 2).............................................................................97
3.5.3.11 MMADR—Memory Mapped Range Address Register
(Device 2).............................................................................98
3.5.3.12 SVID2—Subsystem Vendor Identification Register
(Device 2).............................................................................98
3.5.3.13 SID2—Subsystem Identification Register (Device 2) ........98
3.5.3.14 ROMADR—Video BIOS ROM Base Address Registers
(Device 2).............................................................................99
3.5.3.15 CAPPOINT—Capabilities Pointer Register (Device 2)......99
3.5.3.16 INTRLINE—Interrupt Line Register (Device 2)..................99
3.5.3.17 INTRPIN—Interrupt Pin Register (Device 2) ...................100
3.5.3.18 MINGNT—Minimum Grant Register (Device 2) ..............100
3.5.3.19 MAXLAT—Maximum Latency Register (Device 2)..........100
3.5.3.20 PMCAPID—Power Management Capabilities ID Register
(Device 2)...........................................................................100
3.5.3.21 PMCAP—Power Management Capabilities Register
(Device 2)...........................................................................101
3.5.3.22 PMCS—Power Management Control/Status Register
(Device 2)...........................................................................101
Device 6 Registers ..........................................................................102
3.5.4.1 DWTC—DRAM Write Throttling Control Register
(Device 6)...........................................................................102
3.5.4.2 DRTC—DRAM Read Throttling Control Register
(Device 6)...........................................................................103
4
Functional Description ...................................................................................105
4.1 Processor System Bus.................................................................................105
Intel® 82845G/82845GL/82845GV GMCH Datasheet
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