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A3950 데이터 시트보기 (PDF) - Allegro MicroSystems

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A3950
Allegro
Allegro MicroSystems Allegro
A3950 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Preliminary Data Sheet
Subject to Change without Notice
November 4, 2005
A3950
DMOS Full-Bridge Motor Driver
ELECTRICAL CHARACTERISTICS at TJ = 25°C, VBB = 8 to 36 V, unless noted otherwise
Characteristics
Symbol
Test Conditions
Min. Typ. Max. Units
Motor Supply Current
fPWM < 50 kHz
IBB Charge pump on, outputs disabled
Sleep mode
– 6 8.5 mA
– 3 4.5 mA
– – 10 μA
PHASE, ENABLE, MODE Input
Voltage
SLEEP Input Voltage
PHASE, MODE Input Current1
ENABLE Input Current
SLEEP Input Current
NFAULT Output Voltage
Input Hysteresis, except SLEEP
Output On Resistance
Propagation Delay Time
VIH
VIL
VIH
VIL
IIH
IIL
IIH
IIL
IIH
IIL
VOL
VIHys
RDS(on)
tpd
VIN = 2.0 V
VIN = 0.8 V
VIN = 2.0 V
VIN = 0.8 V
VIN = 2.7 V
VIN = 0.8 V
Isink = 1.0 mA
Source driver, IOUT = -2.8 A, TJ=25°C
Source driver, IOUT = -2.8 A, TJ=125°C
Sink driver, IOUT = 2.8 A, TJ=25°C
Sink driver, IOUT = 2.8 A, TJ=125°C
PWM, change to source or sink ON
PWM, change to source or sink OFF
2.0 – – V
– – 0.8 V
2.7 – – V
– – 0.8 V
– <1.0 20 μA
– <–2.0 –20 μA
– 40 100 μA
– 16 40 μA
– 27 50 μA
– <1 10 μA
– – 0.4 V
100 150 200 mV
– 0.35 0.48 Ω
– 0.55 0.8 Ω
– 0.3 0.43 Ω
– 0.45 0.7 Ω
– 600 – ns
– 100 – ns
Crossover Delay
Protection Circuitry
tCOD
– 500 – ns
UVLO Threshold
VUV VBB increasing
– 6.5 – V
UVLO Hysteresis
VUVHys
– 250 – mV
Overcurrent Threshold2
IOCP
3––A
Overcurrent Protection Period
tOCP
– 1.2 – ms
Thermal Warning Temperature
TJW Temperature increasing
– 160 – °C
Thermal Warning Hysteresis
TJWHys Recovery = TJW – TJWHys
– 15 – °C
Thermal Shutdown Temperature
TJTSD Temperature increasing
– 175 – °C
Thermal Shutdown Hysteresis
TJTSDHys Recovery = TJTSD – TJTSDHys
– 15 – °C
1For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
2Overcurrent protection is tested at 25°C in a restricted range and guaranteed by characterization.
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions*
Package Thermal Resistance
4-layer PCB based on JEDEC standard
RθJA
2-layer PCB with 3.8 in.2 copper both sides, connected by thermal vias
*Additional thermal data available on the Allegro Web site.
Value Units
34 ºC/W
43 ºC/W
A3950DS
Allegro MicroSystems, Inc.
3
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com

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