A3972 데이터 시트보기 (PDF) - Allegro MicroSystems
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A3972 Datasheet PDF : 11 Pages
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A3972
Dual DMOS Full-Bridge
Microstepping PWM Motor Driver
FUNCTIONAL BLOCK DIAGRAM
0.22 MF
0.22 MF
LOGIC
SUPPLY
15
VDD
VREG
22
CP2
3
CP1
2
2V
UVLO AND
FAULT
REGULATOR
DETECT
BANDGAP
CHARGE PUMP
MUX 14
6-BIT
LINEAR
DAC
6
+-
SENSE1
DMOS H-BRIDGE
VCP
OSCILATOR
OSC
24 OSC SELECT/
DIVIDER
PROGRAMMABLE
PWM TIMER
FIXED-OFF
BLANK
MIXED DECAY
CLOCK 11
DATA 12
STROBE 10
SERIAL
PORT
SLEEP 23
CONTROL
LOGIC
PHASE 1/2
SYNC. RECT. MODE
SYNC. RECT. DISABLE
MODE 1/2
GATE
DRIVE
DMOS H-BRIDGE
PROGRAMMABLE
PWM TIMER
2V
FIXED-OFF
BLANK
6
MIXED DECAY
REF 13
BUFFER
6-BIT
LINEAR
DAC
Dwg. FP-050-1
+-
67
GROUND
18 19
VCP
1
VBB1
5
LOAD
SUPPLY
0.22 MF
OUT1A
9
OUT1B
4
SENSE1
8
20
VBB2
0.1 MF
OUT2A
16
OUT2B
21
SENSE2
17
0.1 MF
Allegro MicroSystems, LLC
3
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Copyright © 2000, Allegro MicroSystems, LLC
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