A3949SLP 데이터 시트보기 (PDF) - Allegro MicroSystems

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A3949SLP

DMOS Full-Bridge Motor Driver

Allegro MicroSystems 

A3949

DMOS Full-Bridge Motor Driver

Terminal List Table

Name

Description

N/C

MODE

PHASE

GND

SLEEP

ENABLE

OUTA

SENSE

VBB

OUTB

CP1

CP2

GND

VCP

VREG

N/C

Not used

Logic input

Logic input for direction control

Ground

Logic input

Logic input

Output A for full bridge

Power return

Load supply voltage

Output B for full bridge

Charge pump capacitor

Charge pump capacitor

Ground

Reservoir capacitor

Low side gate supply decoupler

Not used

Number

TSSOP-16

SOIC-16

1

1

2

2

3

3

4*

4*

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13*

13*

14

14

15

15

16

16

*For the TSSOP package, connect pins 4 and 13 to the exposed thermal pad via the PCB

layout. In the SOIC package, the pins are internally connected.

6

www.allegromicro.com

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

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