A4982 데이터 시트보기 (PDF) - Allegro MicroSystems

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A4982

DMOS Microstepping Driver with Translator And Overcurrent Protection

Allegro MicroSystems 

A4982

DMOS Microstepping Driver with Translator

And Overcurrent Protection

Sleep Mode ( ¯S¯¯L¯¯E¯¯E¯¯P¯ ). To minimize power consumption

when the motor is not in use, this input disables much of the

internal circuitry including the output FETs, current regulator,

and charge pump. A logic low on the S¯¯L¯¯E¯¯E¯¯P pin puts the A4982

into Sleep mode. A logic high allows normal operation, as well as

start-up (at which time the A4982 drives the motor to the Home

microstep position). When emerging from Sleep mode, in order

to allow the charge pump to stabilize, provide a delay of 1 ms

before issuing a Step command.

Mixed Decay Operation. The bridge operates in Mixed

decay mode, at power-on and reset, and during normal running

according to the ROSC configuration and the step sequence, as

shown in figures 3 through 6. During Mixed decay, when the trip

point is reached, the A4982 initially goes into a fast decay mode

for 31.25% of the off-time, tOFF . After that, it switches to Slow

decay mode for the remainder of tOFF. A timing diagram for this

feature appears in figure7.

Typically, mixed decay is only necessary when the current in the

winding is going from a higher value to a lower value as determined

by the state of the translator. For most loads automatically-selected

mixed decay is convenient because it minimizes ripple when the cur-

rent is rising and prevents missed steps when the current is falling.

For some applications where microstepping at very low speeds is

necessary, the lack of back EMF in the winding causes the current to

increase in the load quickly, resulting in missed steps. This is shown

in figure 2. By pulling the ROSC pin to ground, mixed decay is set

to be active 100% of the time, for both rising and falling currents,

and prevents missed steps as shown in figure 3. If this is not an issue,

it is recommended that automatically-selected mixed decay be used,

because it will produce reduced ripple currents. Refer to the Fixed

Off-Time section for details.

Synchronous Rectification. When a PWM-off cycle is

triggered by an internal fixed-off-time cycle, load current recircu-

lates according to the decay mode selected by the control logic.

This synchronous rectification feature turns on the appropriate

FETs during current decay, and effectively shorts out the body

diodes with the low FET RDS(ON). This reduces power dissipation

significantly, and can eliminate the need for external Schottky

diodes in many applications. Synchronous rectification turns off

when the load current approaches zero (0 A), preventing reversal

of the load current.

5 A / div.

Fault

latched

t→

Figure 4. Short-to-ground event

5 A / div.

Fixed off-time

t→

Figure 5. Shorted load (OUTxA → OUTxB) in

Slow decay mode

5 A / div.

Fixed off-time

Fast decay portion

(direction change)

t→

Figure 6. Shorted load (OUTxA → OUTxB) in

Mixed decay mode

Allegro MicroSystems, Inc.

10

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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