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A5338

Smoke Detector with Interconnect and Timer

Allegro MicroSystems 

A5338 Smoke Detector with Interconnect and Timer

Functional Description

The A5338 is a low-current CMOS circuit providing all of the

required features for an ionization-type smoke detector.

Oscillator. An internal oscillator operates with a period of 1.67 s

during no-smoke conditions. Every 1.67 s, internal power is

applied to the entire circuit and a check is made for smoke. Every

24 oscillator cycles (40 s total), the LED is pulsed and a check is

made for low battery by comparing VDD to an internal reference.

Because very low currents are used in the device, the oscillator

capacitor, COSC, at the OSC CAP pin should be a low-leakage

type (PTFE, polystyrene, or polypropylene).

Detector Circuitry. When smoke is detected, the resistor

divider network that sets the sensitivity (smoke trip point) is

altered to increase the voltage on the SENSITIVITY SET pin by

130 mV typical, when there are no external connections to the

SENSITIVITY SET pin or LOW-V SET pin. This provides hys-

teresis and reduces false triggering. An active guard is provided

on both GUARDx pins, adjacent to the DETECT IN detec-

tor input pin. The voltage at the GUARDx pins will be within

100 mV of DETECT IN. This will keep surface leakage currents

to a minimum, and provide a method of measuring the input

voltage without loading the ionization chamber. The active guard

amplifier is not power-strobed and thus provides constant protec-

tion from surface leakage currents. The detector input has internal

diode protection against static damage.

Alarm Circuitry. If smoke is detected, the oscillator period

changes to 40 ms and the horn is enabled. The horn output is 160

ms ON, and 80 ms OFF, typical. During the OFF time, smoke is

again checked and the circuit will inhibit further horn output if

smoke is not sensed. During smoke conditions, the low-battery-

warning is inhibited. The LED is driven at a 1 Hz rate, and will

only turn ON while the horn outputs are in the OFF state.

Sensitivity Adjust. The detector sensitivity to smoke is set

internally by a voltage divider connected between VDD and VSS.

The sensitivity can be externally adjusted to the individual char-

acteristics of the ionization chamber by connecting a resistor, RS,

between the SENSITIVITY SET pin and +SUPPLY, or between

SENSITIVITY SET pin and –SUPPLY.

Low Battery. The low-battery threshold is set internally by a

voltage divider connected between VDD and VSS. The threshold

can be increased by connecting a resistor, RLV, between the

LOW-V SETpin and +SUPPLY. The threshold can be decreased

by connecting RLV between LOW-V SETpin and –SUPPLY. The

battery voltage level is checked every 40 s during the 10 mA, 10

ms LED pulse. If an LED is not used, it should be replaced with

an equivalent resistor (typically 500 to 1000 Ω), such that the bat-

tery loading remains at 10 mA.

Timer. An internal timer is provided that can be used in various

configurations to allow for a period of reduced smoke detector

sensitivity, Hush mode. When a high-to-low transition occurs at

the TIMER START pin, the internal timer is reset, Timer mode is

enabled, and the circuit is reset to a no-alarm condition. Dur-

ing Hush mode, the LED will flash at a 10 s rate. If the level

of smoke is increased such that the reduced sensitivity level is

reached, the device will go into the alarm condition. The timer,

however, will continue to completion of the nominal 6.5 minute

period (232 oscillator cycles). If Timer mode is not used, the

TIMER START pin should be tied low. While in Hush mode, the

battery is checked. If a low-battery condition is detected, the low-

battery warning chirp will be activated.

I/O. The I/O pin provides a terminal to allow multiple smoke

detectors to be commoned. If any single unit detects smoke (I/O

is driven high), all connected units will sound their associated

horns after a nominal 3 s delay. The LED is suppressed when an

alarm is signaled from another interconnected unit. An inter-

nal NMOS device acts as a charge dump to aid in applications

involving a large (distributed) capacitance on the I/O pin. The

charge dump is activated only on the removal of a local alarm.

Testing. On power-up, all internal counters are reset. Internal

test circuitry allows for low-battery check by holding the

FEEDBACK and OSC CAP pins low during power-up, then

reducing VDD and monitoring HORN1. All functional tests can be

accelerated by driving OSC CAP with a 2 kHz square wave. The

10 ms strobe period must be maintained for proper operation of

the comparator circuitry.

26110.1

Allegro MicroSystems, Inc.

5

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

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