ACPL-38JT-000E 데이터 시트보기 (PDF) - Avago Technologies

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ACPL-38JT-000E

Automotive Gate Drive Optocoupler with R2Coupler™ Isolation, 2.5 Amp Output Current, Integrated Desaturation (VCE) Detection and Fault Status Feedback

Avago Technologies 

Package Pin Out

1 GND1

2 VIN+

3 VIN

4 VCC1

5 RESET

6 FAULT

7 VLED1+

8 VLED1

VE 16

VLED2+ 15

DESAT 14

VCC2 13

VEE 12

VC 11

VOUT 10

VEE 9

Pin Descriptions

Symbol

VIN+

VIN-

VCC1

GND1

RESET

FAULT

VLED1+

VLED1-

Description

Noninverting gate drive voltage output (VOUT)

control input.

Inverting gate drive voltage output (VOUT)

control input.

Positive input supply voltage. (4.5 V to 5.5 V)

Symbol

VE

VLED2+

DESAT

Input Ground.

FAULT reset input. A logic low input for at least

0.1 s, asynchronously resets FAULT output high

and enables VIN. Synchronous control of RESET

relative to VIN is required. RESET is not affected

by UVLO. Asserting RESET while VOUT is high does

not affect VOUT.

Fault output. FAULT changes from a high impedance

state to a logic low output within 5 s of the voltage

on the DESAT pin exceeding an internal reference

voltage of 7 V. FAULT output remains low until RESET

is brought low. FAULT output is an open collector

which allows the FAULT outputs from all HCPL-316Js

in a circuit to be connected together in a “wired OR”

forming a single fault bus for interfacing directly to

the micro-controller.

LED 1 anode. This pin must be left unconnected

for guaranteed data sheet performance.

(For optical coupling testing only.)

LED 1 cathode. This pin must be connected to

ground.

VCC2

VC

VOUT

VEE

Description

Common (IGBT emitter) output supply voltage.

LED 2 anode. This pin must be left unconnected

for guaranteed data sheet performance.

(For optical coupling testing only.)

Desaturation voltage input. When the voltage

on DESAT exceeds an internal reference voltage

of 7 V while the IGBT is on, FAULT output is changed

from a high impedance state to a logic low state

within 5 s. See Note 25.

Positive output supply voltage.

Collector of output pull-up triple-darlington

transistor. It is connected to VCC2 directly or through

a resistor to limit output turn-on current.

Gate drive voltage output.

Output supply voltage.

5

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