ACPL-C79B-500E 데이터 시트보기 (PDF) - Avago Technologies
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ACPL-C79B-500E Datasheet PDF : 14 Pages
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Definitions
Gain
Gain is defined as the slope of the best-fit line of differen-
tial output voltage (VOUT+ – VOUT–) vs. differential input
voltage (VIN+ – VIN–) over the nominal input range, with
offset error adjusted out.
Nonlinearity
Nonlinearity is defined as half of the peak-to-peak output
deviation from the best-fit gain line, expressed as a per-
centage of the full-scale differential output voltage.
Input DC Common Mode Rejection Ratio, CMRRIN
CMRRIN is defined as the ratio of the differential signal
gain (signal applied differentially between pins VOUT+ and
VOUT–) to the input side common-mode gain (input pins
tied together and the signal applied to both inputs with
respect to pin GND1), expressed in dB.
Common Mode Transient Immunity, CMTI, also known as Com-
mon Mode Rejection
CMTI is tested by applying an exponentially rising/falling
voltage step on pin 4 (GND1) with respect to pin 5 (GND2).
The rise time of the test waveform is set to approximately
50 ns. The amplitude of the step is adjusted until the dif-
ferential output (VOUT+ – VOUT–) exhibits more than a 200
mV deviation from the average output voltage for more
than 1μs. The ACPL-C79B/C79A/C790 will continue to
function if more than 10 kV/μs common mode slopes are
applied, as long as the breakdown voltage limitations are
observed.
Power Supply Rejection, PSR
PSR is the ratio of differential amplitude of the ripple
outputs over power supply ripple voltage, referred to the
input, expressed in dB.
POSITIVE
FLOATING
SUPPLY
HV+
C5
47 pF
MOTOR + –
***
RSENSE
GATE DRIVE
CIRCUIT
***
R3
U1
78L05 VDD1
IN OUT
C1
C2
1
0.1
0.1
µF
R5 µ F
2
10
C3
U2
47 nF 3
VDD2 (+5 V)
8 C4
0.1 µF
7
R1
2.00 K
6
R2
10.0 K
+15 V
C8
0.1 µF
GND2
–
U3
VOUT
+ TL032A
GND1
***
2.00 K
4
5
C7
C6
47 pF
R4
10.0 K
0.1 µF
ACPL-C79B/
ACPL-C79A/
-15 V GND2
ACPL-C790
GND2
GND2
HV-
Figure 21. Typical application circuit for motor phase current sensing.
11
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