ACPL-M43T-060E 데이터 시트보기 (PDF) - Avago Technologies
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ACPL-M43T-060E
Avago Technologies
ACPL-M43T-060E Datasheet PDF : 9 Pages
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Switching Specifications (AC)
Over recommended operating (TA = -40°C to 125°C), IF = 10mA, VCC = 5.0 V unless otherwise specified.
Parameter
Symbol Min Typ Max Units
Test Conditions
Fig. Note
Propagation Delay
Time to Logic Low
at Output
Propagation Delay
Time to Logic High
at Output
Pulse Width
Distortion
Propagation Delay
Difference Between
Any 2 Parts
Common Mode
Transient Immunity
at Logic High Output
TPHL
0.08
0.06
TPLH
0.15
0.03
PWD
0
0
tPLH-tPHL 0
0
|CMH|
15
0.2 0.8 μs
1.0 μs
TA=25°C Pulse: f=10kHz, Duty cycle =50%, 5,6,7, 5
IF = 10mA, VCC = 5.0 V, RL = 1.9k 8,9,
CL = 15pF VTHHL=1.5V
10,13
0.3 0.8 μs
1.0 μs
TA=25°C Pulse: f=10kHz, Duty cycle =50%, 5,6,7, 5
IF = 10mA, VCC = 5.0 V, RL = 1.9k 8,9,
CL = 15pF VTHLH=2.0V
10,13
0.4 0. 45 μs
TA=25°C Pulse: f=10kHz, Duty cycle =50%,
8
0.85 μs
IF=10mA, VCC=5.0V, RL=1.9k,
CL=15pF, VTHHL=1.5V, VTHLH=2.0V
0.4 0.5 μs
TA=25°C Pulse: f=10kHz, Duty cycle =50%,
9
0.9 μs
IF=10mA, VCC=5.0V, RL=1.9k,
CL=15pF, VTHHL=1.5V, VTHLH=2.0V
30
kV/μs
VCM=1500Vp-p, IF=0mA, TA=25°C, 14
4, 5
RL=1.9k
Common Mode
Transient Immunity
at Logic Low Output
|CML|
15 30
kV/μs
VCM=1500Vp-p, IF=10mA,
14
TA=25°C, RL=1.9k
Package Characteristics
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an
input-output continuous voltage rating.
Parameter
Input-Output Momentary
Withstand Voltage*
Input-Output Resistance
Input-Output Capacitance
Symbol Min. Typ. Max. Units Test Conditions
Fig. Note
VISO
4000
VRMS RH 50%, t = 1 min;
2, 3
TA = 25°C
RI-O
1014
VI-O = 500 Vdc
2
CI-O
0.6
pF
f = 1 MHz; VI-O = 0 Vdc
2
Notes:
1. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100.
2. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
3. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4800 VRMS for 1 second.
4. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM,
to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum
tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state
(i.e., VO < 0.8 V).
5. The 1.9 k load represents 1 TTL unit load of 1.6 mA and the 5.6 k pull-up resistor.
6. The frequency at which the ac output voltage is 3 dB below its mid-frequency value.
7. Use of a 0.1 μF bypass capacitor connected between pins 4 and 6 is recommended.
8. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH| for any given device.
9. The difference between tPLH and tPHL between any two parts under the same test condition.
6
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