ACPL-W314-560E(2009) 데이터 시트보기 (PDF) - Avago Technologies
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ACPL-W314-560E Datasheet PDF : 13 Pages
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Applications Information
Eliminating Negative IGBT Gate Drive
To keep the IGBT firmly off, the ACPL-P314/W314 has a
very low maximum VOL specification of 1.0 V. Minimizing
Rg and the lead inductance from the ACPL-P314/W314
to the IGBT gate and emitter (possibly by mounting the
ACPL-P314/W314 on a small PC board directly above the
IGBT) can eliminate the need for negative IGBT gate drive
in many applications as shown in Figure 19. Care should
be taken with such a PC board design to avoid routing
the IGBT collector or emitter traces close to the ACPL-
P314/W314 input as this can result in unwanted coupling
of transient signals into the input of ACPL-P314/W314
and degrade performance. (If the IGBT drain must be
routed near the ACPL-P314/W314 input, then the LED
should be reverse biased when in the off state, to prevent
the transient signals coupled from the IGBT drain from
turning on the ACPL-P314/W314.
Selecting the Gate Resistor (Rg)
Step 1: Calculate Rg minimum from the IOL peak specifi-
cation. The IGBT and Rg in Figure 19 can be analyzed as
a simple RC circuit with a voltage supplied by the ACPL-
P314/W314.
R g ≥ V C − V OL
IOLPEAK
32 − 5
=
0.6
= 32 Ω
The VOL value of 5 V in the previous equation is the VOL at
the peak current of 0.6A. (See Figure 6).
PT =PE +PO
PE = IF • V F • DutyCycle
P O = P O(BIAS) + P O(SWITCHING) = ICC • V CC + E SW (Rg; Q g ) • f
= (I CCBIAS + K ICC • Q g • f ) • VCC + E SW (Rg ; Q g ) • f
R g ≥ V C − V OL
IOLPEAK
32 − 5
SteRpg ≥2:=VCCh0−e.6cVkOLthe ACPL-P314/W314 power dissipation
and inc=reI3aO2LsPΩeEAKRg if necessary. The ACPL-P314/W314 total
power
power
(d=PisE3s)20iap.−6na5dtiothne(PoTu)tipsuetqpuoawl teor
the sum
(PO).
of
the
emitter
P T = P=E +32PΩO
PE = IF • V F • DutyCycle
P O = P O(BIAS) + P O(SWITCHING) = ICC • V CC + E SW (Rg; Q g ) • f
PT
PE
===IP(FIEC•C+BVIAPFSO•+DKuItCyCCy•clQeg
• f) • VCC
+ E SW
(R g
;Qg )• f
wacinrhPcdeOuriK=e=tIPCi(KnICOCIC(CBFBCiIIiAsAgSS·)ua+Q+rPgKecOIo·C(1SCnfW9•sIiTstwCQaHtIignhNtGh•te) f=Ioi)Fn•fIcC(VCwr0Ce•C.o0a+Vr0ssCEe1CtSWi+cnmaE(sIARSCeWg/C)(;(n=QdRCgug1;)*eQ0•kgtHfm)o•zA)sf.w, FRiotgcrh=tinh3g2e
Ω,PME =ax10DmuAt•y1C.8yVc•le0.8==8104%mW, Qg = 100 nC, f = 20 kHz and
TAPMOAX= =(3 m85A°+C(:0.001 mA/nC • kHz) • 20 kHz • 100 nC) • 24V +
0.4 µJ • 20 kHz = 128 mW ≤ 250 mW ( PO(MAX) @85 °C)
PE = 10 mA • 1.8V • 0.8 = 14 mW
PO = (3 mA + (0.001 mA/nC • kHz) • 20 kHz • 100 nC) • 24V +
0.4 µJ • 20 kHz = 128 mW ≤ 250 mW ( PO(MAX) @85 °C)
The value of 3 mA for ICC in the previous equation is the
max. ICC over entire operating temperature range.
Since PO for this case is less than PO(MAX), Rg = 32 Ω is
alright for the power dissipation.
PE = 10 mA • 1.8V • 0.8 = 14 mW
PO = (3 mA + (0.001 mA/nC • kHz) • 20 kHz • 100 nC) • 24V +
0.4 µJ
+5 V
•
20
kHz
=
128
mW
≤
250
mW
(
P
O(MAX)
@85
°C)
270 Ω
1
ACPL-P314/W314
CONTROL
INPUT
2
74XXX
OPEN
3
COLLECTOR
Figure 20. Energy Dissipated in the ACPL-P314/W314 and for Each IGBT
Switching Cycle.
6
0.1 µF
5
4
+ VCC = 24V
-
Rg Q1
Q2
+ HVDC
3-PHASE
AC
- HVDC
Figure 19. Recommended LED Drive and Application Circuit for ACPL-P314/W314
11
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