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ACPL-P314-060E 데이터 시트보기 (PDF) - Avago Technologies

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ACPL-P314-060E
AVAGO
Avago Technologies AVAGO
ACPL-P314-060E Datasheet PDF : 14 Pages
First Prev 11 12 13 14
Applications Information
Eliminating Negative IGBT Gate Drive
To keep the IGBT firmly off, the ACPL-P314/W314 has a
very low maximum VOL specification of 1.0 V. Minimizing
Rg and the lead inductance from the ACPL-P314/W314
to the IGBT gate and emitter (possibly by mounting the
ACPL-P314/W314 on a small PC board directly above the
IGBT) can eliminate the need for negative IGBT gate drive
in many applications as shown in Figure 19. Care should
be taken with such a PC board design to avoid routing
the IGBT collector or emitter traces close to the ACPL-
P314/W314 input as this can result in unwanted coupling
of transient signals into the input of ACPL-P314/W314
and degrade performance. (If the IGBT drain must be
routed near the ACPL-P314/W314 input, then the LED
should be reverse biased when in the off state, to prevent
the transient signals coupled from the IGBT drain from
turning on the ACPL-P314/W314.
Selecting the Gate Resistor (Rg)
Step 1: Calculate Rg minimum from the IOL peak specifi-
cation. The IGBT and Rg in Figure 19 can be analyzed as
a simple RC circuit with a voltage supplied by the ACPL-
P314/W314.
R g ³ VCC V OL
IOLPEAK
24 5
=
0.6
= 32 Ω
The VOL value of 5 V in the previous equation is the VOL at
the peak current of 0.6A. (See Figure 6).
Step 2: Check the ACPL-P314/W314 power dissipation
and increase Rg if necessary. The ACPL-P314/W314 total
power dissipation (PT) is equal to the sum of the emitter
power (PE) and the output power (PO).
PT =PE +PO
PE = IF u V F u DutyCycle
P O = P O(BIAS) + P O(SWITCHING) = ICC u V CC + E SW (Rg; Q g ) u f
= (I CCBIAS + K ICC u Q g u f) u VCC + E SW (Rg ; Q g ) u f
where KICC · Qg · f is the increase in ICC due to switching
and KICC is a constant of 0.001 mA/(nC*kHz). For the
circuit in Figure 19 with IF (worst case) = 10 mA, Rg = 32
, Max Duty Cycle = 80%, Qg = 100 nC, f = 20 kHz and
TAMAX = 85°C:
PE = 10 mA u 1.8V u 0.8 = 14 mW
PO = (3 mA + (0.001 mA/nC u kHz) u 20 kHz u 100 nC) u 24V +
0.4 μJ u 20 kHz = 128 mW £ 250 mW ( P O(MAX) @85 °C)
The value of 3 mA for ICC in the previous equation is the
max. ICC over entire operating temperature range.
Since PO for this case is less than PO(MAX), Rg = 32 is
alright for the power dissipation.
4.0
Qg = 50 nC
3.5
Qg = 100 nC
3.0
Qg = 200 nC
Qg = 400 nC
2.5
2.0
1.5
1.0
0.5
0
0
20
40 60 80 100
Rg – GATE RESISTANCE – Ω
Figure 20. Energy Dissipated in the ACPL-P314/W314 and for Each IGBT
Switching Cycle.
+5 V
CONTROL
INPUT
74XXX
OPEN
COLLECTOR
270 Ω
1
2
3
ACPL-P314/W314
6
0.1 μF
5
4
+ VCC = 24V
-
Rg Q1
Q2
Figure 19. Recommended LED Drive and Application Circuit for ACPL-P314/W314
+ HVD
3-PHASE
AC
- HVDC
11

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