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ACPL-P456-000E 데이터 시트보기 (PDF) - Avago Technologies

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ACPL-P456-000E Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ITOTAL*
300 Ω
1 ICLEDP
IF
2
ICLED01
CLED01
6
5 VOUT
3 CLEDN
SHIELD
4
* THE ARROWS INDICATE THE DIRECTION
OF CURRENT FLOW DURING + dVCM /dt
20 kΩ
100pF
VCM
Figure 16. AC Equivalent Circuit for Figure 15 during Common Mode Tran-
sients.
+ VR**-
1 CLEDP
2
CLED01
6
5 VOUT
300 Ω 3 ICLEDN* CLEDN SHIELD
4
* THE ARROWS INDICATE THE DIRECTION OF CURRENT
FLOW FOR + dVCM /dt TRANSIENTS.
** OPTIONAL CLAMPING DIODE FOR IMPROVED CMH
PERFORMANCE. VR < VF (OFF)DURING + dVCM/dt
20 kΩ
100pF
VCM
Figure 17. AC Equivalent Circuit for Figure 12 during Common Mode Tran-
sients.
CMR With The LED Off (CMRH)
A high CMR LED drive circuit must keep the LED off (VF
≤ VF(OFF)) during common mode transients. For example,
during a +dVCM/dt transient in Figure 17, the current
flowing through CLEDN is supplied by the parallel com-
bination of the LED and series resistor. As long as the
voltage developed across the resistor is less than VF(OFF)
the LED will remain off and no common mode failure
will occur. Even if the LED momentarily turns on, the
100 pF capacitor from pins 5-4 will keep the output from
dipping below the threshold. The recommended LED
drive circuit (Figure 12) provides about 10 V of margin
between the lowest optocoupler output voltage and a
3 V IPM threshold during a 15kV/μs transient with VCM
= 1500 V. Additional margin can be obtained by adding
a diode in parallel with the resistor, as shown by the
dashed line connection in Figure 17, to clamp the voltage
across the LED below VF(OFF).
Since the open collector drive circuit, shown in Figure 18,
cannot keep the LED off during a +dVCM/dt transient, it is
not desirable for applications requiring ultra high CMRH
performance. Figure 19 is the AC equivalent circuit for
Figure 18 during common mode transients. Essentially
all the current flowing through CLEDN during a +dVCM/dt
transient must be supplied by the LED. CMRH failures can
occur at dv/dt rates where the current through the LED
and CLEDN exceeds the input threshold. Figure 20 is an al-
ternative drive circuit which does achieve ultra high CMR
performance by shunting the LED in the off state.
+5 V
1
6
2
5
3
Q1
SHIELD
4
Figure 18. Not Recommended Open Collector LED Drive Circuit.
1 CLEDP
2
CLED01
6
5 VOUT
Q1
300 Ω 3 ICLEDN* CLEDN SHIELD
4
* THE ARROWS INDICATE THE DIRECTION OF CURRENT
FLOW FOR + dVCM /dt TRANSIENTS.
20 kΩ
100pF
VCM
Figure 19. AC Equivalent Circuit for Figure 18 during Common Mode Tran-
sients.
+5 V
1
6
2
5
3
SHIELD
4
Figure 20. Recommended LED Drive Circuit for Ultra High CMR.
10

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