ACPL-P343-500E 데이터 시트보기 (PDF) - Avago Technologies

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ACPL-P343-500E

4.0 Amp Output Current IGBT Gate Drive Optocoupler with Rail-to-Rail Output Voltage in Stretched SO6

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Notes:

1. Derate linearly above 70° C free-air temperature at a rate of 0.3 mA/°C.

2. Maximum pulse width = 10 s. This value is intended to allow for component tolerances for designs with IO peak minimum = 3.0 A. See applications

section for additional details on limiting IOH peak.

3. Derate linearly above 85° C free-air temperature at a rate of 16.9 mW/°C .

4. Derate linearly above 85° C free-air temperature at a rate of 15.3 mW/°C . The maximum LED junction temperature should not exceed 125° C.

5. Maximum pulse width = 50 s.

6. Output is sourced at -3.0 A with a maximum pulse width = 10 s. VCC-VO is measured to ensure 15 V or below.

7. Output is sourced at 3.0 A with a maximum pulse width = 10 s. VO-VEE is measured to ensure 15 V or below.

8. Output is sourced at -3.0 A/3.0 A with a maximum pulse width = 10 s.

9. In this test VOH is measured with a DC load current. When driving capacitive loads, VOH will approach VCC as IOH approaches zero amps.

10. Maximum pulse width = 1 ms.

11. Pulse Width Distortion (PWD) is defined as |tPHL-tPLH| for any given device.

12. The difference between tPHL and tPLH between any two ACPL-P343 parts under the same test condition.

13. Pin 2 needs to be connected to LED common.

14. Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the

output will remain in the high state (i.e., VO > 15.0 V).

15. Common mode transient immunity in a low state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output

will remain in a low state (i.e., VO < 1.0 V).

16. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≤ 4500 VRMS for 1 second (leakage detection

current limit, II-O < 5 A).

17. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≤ 6000 VRMS for 1 second (leakage detection

current limit, II-O < 5 A).

18. Device considered a two-terminal device: pins 1, 2, and 3 shorted together and pins 4, 5 and 6 shorted together.

19. The device was mounted on a high conductivity test board as per JEDEC 51-7

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