AD1986 데이터 시트보기 (PDF) - Analog Devices
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AD1986 Datasheet PDF : 52 Pages
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AD1986
Table 17.
Symbol
tSYNC_HIGH
tCLK_LOW
tCLK_PERIOD
tSYNC_HIGH
tSYNC_LOW
tSYNC_PERIOD
BIT_CLK
SYNC
tCLK_LOW
tCLK_HIGH
tCLK_PERIOD
tSYNC_LOW
tSYNC_HIGH
tSYNC_PERIOD
Figure 5. Bit Clock and Sync Timing
Parameter
BITCLK High Pulse Width
BITCLK Low Pulse Width
BITCLK Period
BIT_CLK Frequency
BIT_CLK Frequency Accuracy
BIT_CLK Jitter1, 2
Sync Active (High) Pulse Width
Sync Inactive (Low) Pulse Width
Sync Period
Sync Frequency
Min
Typ
40.5
39.7
81.4
12.288
750
1.3
19.5
20.8
48.0
Max
Units
41.7
nS
40.6
nS
nS
MHz
±1.0
ppm
ps
µS
µS
µS
kHz
1 Guaranteed by design, but not production tested.
2 Output jitter directly dependent on input clock jitter.
SLOT 1
SYNC
SLOT 2
Table 18.
Symbol
tS2_PDOWN
BIT_CLK
SDATA_OUT
WRITE TO
03 26
DATA
PR4
SDATA_IN
tS2_PDOWN
BIT_CLK NOT TO SCALE
Figure 6. Link Low Power Mode Timing
Parameter
Min
End of Slot 2 to BIT_CLK, SDATA_IN Low
0
Typ
Max
Units
1.0
µS
Rev. 0 | Page 10 of 52
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