AD5162 데이터 시트보기 (PDF) - Analog Devices
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AD5162 Datasheet PDF : 20 Pages
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AD5162
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS: 2.5 kΩ VERSION
VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted.
Table 1.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
Wiper Resistance
DC CHARACTERISTICS—POTENTIOMETER
DIVIDER MODE4
Differential Nonlinearity5
Integral Nonlinearity5
Voltage Divider Temperature
Coefficient
Full-Scale Error
Zero-Scale Error
RESISTOR TERMINALS
Voltage Range6
Capacitance A, B7
Capacitance W7
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
Input Logic High
Input Logic Low
Input Logic High
Input Logic Low
Input Current
Input Capacitance7
POWER SUPPLIES
Power Supply Range
Supply Current
Power Dissipation8
Power Supply Sensitivity
DYNAMIC CHARACTERISTICS9
Bandwidth, −3 dB
Total Harmonic Distortion
VW Settling Time
Resistor Noise Voltage Density
Symbol
R-DNL
R-INL
∆RAB
(∆RAB/RAB )/∆T
RWB
DNL
INL
(∆VW/VW)/∆T
VWFSE
VWZSE
VA, VB, VW
CA, CB
CW
ICM
VIH
VIL
VIH
VIL
IIL
CIL
VDD RANGE
IDD
PDISS
PSS
BW
THDW
tS
eN_WB
Conditions
RWB, VA = no connect
RWB, VA = no connect
TA = 25°C
VAB = VDD, wiper = no connect
Code = 0x00, VDD = 5 V
Code = 0x80
Code = 0xFF
Code = 0x00
f = 1 MHz, measured to GND,
code = 0x80
f = 1 MHz, measured to GND,
code = 0x80
VA = VB = VDD/2
VDD = 5 V
VDD = 5 V
VDD = 3 V
VDD = 3 V
VIN = 0 V or 5 V
VIH = 5 V or VIL = 0 V
VIH = 5 V or VIL = 0 V, VDD = 5 V
VDD = 5 V ± 10%, code = midscale
Code = 0x80
VA = 1 V rms, VB = 0 V, f = 1 kHz
VA = 5 V, VB = 0 V, ±1 LSB error band
RWB = 1.25 kΩ, RS = 0
Min Typ1 Max Unit
−2
±0.1 +2
LSB
−14 ±2
+14 LSB
−20
+55 %
35
ppm/°C
160
200
Ω
−1.5 ±0.1 +1.5 LSB
−2
±0.6 +2
LSB
15
ppm/°C
−14 −5.5 0
LSB
0
4.5
12
LSB
GND
45
60
1
VDD
V
pF
pF
nA
2.4
2.1
5
V
0.8
V
V
0.6
V
±1
µA
pF
2.7
5.5
V
3.5
6
µA
30
µW
±0.02 ±0.08 %/%
4.8
MHz
0.1
%
1
µs
3.2
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.
3 VA = VDD, VB = 0 V, wiper (VW) = no connect.
4 Specifications apply to all VRs.
5 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V.
DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
6 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
7 Guaranteed by design, but not subject to production test.
8 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
9 All dynamic characteristics use VDD = 5 V.
Rev. C | Page 3 of 20
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