AD571(RevA) 데이터 시트보기 (PDF) - Analog Devices

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AD571
(Rev.:RevA)

10-Bit A/D Converter

Analog Devices 

AD571–SPECIFICATIONS (TA = +25؇C, V+ = +5 V, V– = –12 V or –15 V, all voltages measured with respect to

digital common, unless otherwise noted)

Model

AD571J

Min

Typ

Max

AD571K

Min

Typ

Max

AD571S

Min

Typ

Max

Units

RESOLUTION

RELATIVE ACCURACY, TA

TMIN to TMAX

FULL-SCALE CALIBRATION

UNIPOLAR OFFSET

BIPOLAR OFFSET

10

؎1

؎1

±2

؎1

؎1

10

؎1/2

؎1/2

±2

؎1/2

؎1/2

10

Bits

؎1

LSB

؎1

LSB

±2

LSB

؎1

LSB

؎1

LSB

DIFFERENTIAL NONLINEAIRTY, TA 10

TMIN to TMAX

9

TEMPERATURE RANGE

0

10

10

+70

0

10

10

+70

–55

Bits

Bits

+125 °C

TEMPERATURE COEFFICIENTS

Unipolar Offset

؎2

؎1

؎2

LSB

Bipolar Offset

؎2

؎1

؎2

LSB

Full-Scale Calibration2

؎4

؎2

؎5

LSB

POWER SUPPLY REJECTION

CMOS Positive Supply

+13.5 V ≤ V + ≤ +16.5 V

TTL Positive Supply

+4.5 V ≤ V + ≤ +5.5 V

Negative Supply

–16.0 V ≤ V – ≤ –13.5 V

ANALOG INPUT IMPEDANCE

–

–

–

؎2

؎2

3.0

5.0

7.0

؎1

؎1

؎1

3.0

5.0

7.0

–

–

–

LSB

؎2

LSB

؎2

LSB

3.0

5.0

7.0

kΩ

ANALOG INPUT RANGES

Unipolar

0

Bipolar

–5

+10

0

+5

–5

+10

0

+5

–5

+10

V

+5

V

OUTPUT CODING

Unipolar

Bipolar

Positive True Binary

Positive True Offset Binary

Positive True Binary

Positive True Offset Binary

Positive True Binary

Positive True Offset Binary

LOGIC OUTPUT

Output Sink Current

(VOUT = 0.4 V max, TMIN to TMAX) 3.2

Output Source Current1

(VOUT = 2.4 V max, TMIN to TMAX) 0.5

Output Leakage

3.2

0.5

؎40

3.2

0.5

؎40

mA

mA

؎40

µA

LOGIC INPUT

Input Current

Logic “1”

Logic “0”

CONVERSION TIME, TMIN to TMAX

POWER SUPPLY

V+

V–

2.0

15

25

+4.5 +5.0

–12.0 –15

؎100

0.8

40

+7.0

–16.5

2.0

15

25

+4.5 +5.0

–12.0 –15

؎100

0.8

40

+16.5

–16.5

؎100 µA

2.0

V

0.8

V

15

25

40

µs

+4.5

+5.0

+7.0 V

–12.0 –15

–16.5 V

OPERATING CURRENT

V+

V–

PACKAGE OPTION2

Ceramic DIP (D-18)

7

10

9

15

AD571JD

7

10

9

15

AD571KD

7

10

mA

9

15

mA

AD571SD

NOTES

1The data output lines have active pull-ups to source 0.5 mA. The DATA READY line is open collector with a nominal 6 kΩ internal pull-up resistor.

2For details on grade and package offerings for SD-grade in accordance with MIL-STD-883, refer to Analog Devices’ Military Products databook or current /883B

data sheet.

Specifications subject to change without notice.

Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min

and max specifications are guaranteed, although only those shown in boldface are tested on all production units.

–2–

REV. A

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