AD6634PCB 데이터 시트보기 (PDF) - Analog Devices

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AD6634PCB

80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP)

Analog Devices 

CLK

SYNCA

SYNCB

SYNCC

CYNCD

tSS

tHS

Figure 7. SYNC Timing Inputs

AD6634

CLK

tDPOCLKL

PCLK

Figure 8. PCLK to CLK Switching Characteristics Divide by 1

CLK

tDPOCLKLL

PCLK

tPOCLKH

tPOCLKL

Figure 9. PCLK to CLK Switching Characteristics Divide by 2, 4, or 8

PCLK

PxACK

tSPA

tHPA

Figure 10. Master Mode PxACK to PCLK Setup and Hold Characteristics

REV. 0

–11–

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