AD6636 데이터 시트보기 (PDF) - Analog Devices

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AD6636

150 MSPS, Wideband, Digital Downconverter (DDC)

Analog Devices 

AD6636

SPECIFICATIONS

RECOMMENDED OPERATING CONDITIONS

Table 1.

Parameter

Temp

VDDCORE

Full

VDDIO

Full

TAMBIENT

Full

Test Level

Min

IV

1.7

IV

3.0

IV

−40

ELECTRICAL CHARACTERISTICS1

Table 2.

Parameter

LOGIC INPUTS (NOT 5 V TOLERANT)

Logic Compatibility

Logic 1 Voltage

Logic 0 Voltage

Logic 1 Current

Logic 0 Current

Input Capacitance

LOGIC OUTPUTS

Logic Compatibility

Logic 1 Voltage (IOH = 0.25 mA)

Logic 0 Voltage (IOL = 0.25 mA)

SUPPLY CURRENTS

WCDMA (61.44 MHz) Example1

IVDDCORE

IVDDIO

CDMA 2000 (61.44 MHz) Example1

IVDDCORE

IVDDIO

TDS-CDMA (76.8 MHz) Example1, 2

IVDDCORE

IVDDIO

GSM (65 MHz) Example1, 2

IVDDCORE

IVDDIO

TOTAL POWER DISSIPATION

WCDMA (61.44 MHz)1

CDMA2000 (61.44 MHz)1

TD-SCDMA (76.8 MHz)1, 2

GSM (65 MHz)1, 2

Temp

Full

Full

Full

Full

Full

25°C

Full

Full

Full

25°C

25°C

25°C

25°C

25°C

25°C

25°C

25°C

25°C

25°C

25°C

25°C

Test Level

Min

IV

3.3

IV

2.0

IV

−0.3

IV

IV

V

IV

3.3

IV

2.0

IV

V

V

V

V

V

V

V

V

V

V

V

V

1 One input port, all six channels, and the relevant signal processing blocks are active.

2 PLL is turned off for power savings.

Typ

Max

Unit

1.8

1.9

V

3.3

3.6

V

+25

+85

°C

Typ

Max

Unit

V CMOS

3.6

V

+0.8

V

1

10

μA

1

10

μA

4

pF

VDDIO − 0.2

0.2

0.4

V CMOS

V

V

450

mA

50

mA

400

mA

25

mA

250

mA

15

mA

175

mA

10

mA

975

mW

800

mW

500

mW

350

mW

Rev. A | Page 6 of 80

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