WM8728(2001) 데이터 시트보기 (PDF) - Wolfson Microelectronics plc
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WM8728
(Rev.:2001)
(Rev.:2001)
Wolfson Microelectronics plc
WM8728 Datasheet PDF : 28 Pages
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WM8728
MPU 2-WIRE INTERFACE TIMING
tSCY
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tSCF
SCKDSD
tSSU tSHD
tSCH
tSCL
tDHD tDSU
tSCR
tDR
tESU
SDIDEM
tDF
Figure 6 Program Register Input Timing - 2-Wire Serial Control Mode
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
Program Register Input Information
SCKDSD pulse cycle time
tSCY
SCKDSD pulse width low
tSCL
SCKDSD pulse width high
tSCH
SDIDEM to SCKDSD data set-
tSSU
up time for start signal
SDIDEM from SCKDSD data
tSHD
hold time for start signal
SDIDEM to SCKDSD data set-
tDSU
up time
SCKDSD to SDIDEM data hold
tDHD
time
SCKDSD rise time
tSCR
SCKDSD fall time
tSCF
SDIDEM rise time
tDR
SDIDEM fall time
tDF
SDIDEM to SCKDSD data set-
tESU
up time for stop signal
TEST CONDITIONS
MIN
TYP
MAX
UNIT
80
ns
20
ns
20
ns
10
ns
10
ns
20
ns
20
ns
5
ns
5
ns
5
ns
5
ns
10
ns
Notes:
1. The address for the device in the 2-wire mode is 001101X (binary) with the last bit selectable.
2. In the two-wire interface mode, the CSBIWL pin indicates the final bit of the chip address.
3. In 2-wire mode the LATI2S pin should be tied to either DGND or DVSS to avoid noise toggling the interface into 3-wire
mode.
WOLFSON MICROELECTRONICS LTD
PP Rev 1.2 April 2001
10
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