HI7190IP 데이터 시트보기 (PDF) - Intersil

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HI7190IP

24-Bit, High Precision, Sigma Delta A/D Converter

Intersil 

Timing Diagrams

CS

SCLK

SDIO

HI7190

tPRE

tDSU

tSCLK

tSCLKPW

tSCLKPW

1ST BIT

tDHLD

2ND BIT

FIGURE 1. DATA WRITE TO HI7190

CS

SCLK

SDIO

SDO

DRDY

CS

SCLK

SDIO

tACC

1ST BIT

tDV

2ND BIT

FIGURE 2. DATA READ FROM HI7190

tDRDY

1

5

6

7

8

FIGURE 3. DATA READ FROM HI7190

6

FN3612.10

June 27, 2006

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