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AD7265(RevB) 데이터 시트보기 (PDF) - Analog Devices

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AD7265 Datasheet PDF : 29 Pages
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AD7265
Data Sheet
Parameter
DC Leakage Current
Input Capacitance
REFERENCE INPUT/OUTPUT
Reference Output Voltage 8
Long-Term Stability
Output Voltage Hysteresis2
Reference Input Voltage Range
DC Leakage Current
Input Capacitance
DCAPA, DCAPB Output Impedance
Reference Temperature Coefficient
VREF Noise
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN3
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating State Leakage Current
Floating State Output Capacitance3
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time3
Throughput Rate
POWER REQUIREMENTS
VDD
VDRIVE
IDD
Normal Mode (Static)
Operational, fS = 1 MSPS
fS = 1 MSPS
Partial Power-Down Mode
Full Power-Down Mode (VDD)
Power Dissipation
Normal Mode (Operational)
Partial Power-Down (Static)
Full Power-Down (Static)
Specification
±1
45
10
Unit
µA max
pF typ
pF typ
2.5
150
50
0.1/VDD
±2
25
10
20
10
20
V min/V max
ppm typ
ppm typ
V min/V max
µA max
pF typ
Ω typ
ppm/°C max
ppm/°C typ
µV rms typ
2.8
V min
0.4
V max
±15
nA typ
5
pF typ
VDRIVE − 0.2
0.4
V min
V max
±1
µA max
7
pF typ
Straight (natural) binary
Twos complement
14
SCLK cycles
90
ns max
110
ns max
1
MSPS max
2.7/5.25
2.7/5.25
V min/V max
V min/V max
2.3
mA max
4
mA max
3.2
mA max
500
µA max
1
µA max
2.8
µA max
21
2.625
5.25
mW max
mW max
µW max
1 Temperature range is −40°C to +125°C.
2 See Terminology section.
3 Sample tested during initial release to ensure compliance.
4 Guaranteed no missed codes to 12 bits.
5 VINor VIN+ must remain within GND/VDD.
6 VIN− = 0 V for specified performance. For full input range on VIN− pin, see Figure 28 and Figure 29.
7 For full common-mode range, see Figure 24 and Figure 25.
8 Relates to Pin DCAPA or Pin DCAPB.
Test Conditions/Comments
When in track
When in hold
±0.2% max @ 25°C
For 1000 hours
See Typical Performance Characteristics section
External reference applied to Pin DCAPA/Pin DCAPB
VIN = 0 V or VDRIVE
SGL/DIFF = 1 with 0 V to VREF range selected
SGL/DIFF = 0; SGL/DIFF = 1 with 0 V to 2 × VREF range
875 ns with SCLK = 16 MHz
Full-scale step input; VDD = 5 V
Full-scale step input; VDD = 3 V
Digital I/Ps = 0 V or VDRIVE
VDD = 5.25 V
VDD = 5.25 V; 3.5 mA typ
VDD = 3.6 V; 2.7 mA typ
Static
TA = −40°C to +85°C
TA > 85°C to 125°C
VDD = 5.25 V
VDD = 5.25 V
VDD = 5.25 V, TA = −40°C to +85°C
Rev. B | Page 4 of 28

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