AD7280 데이터 시트보기 (PDF) - Analog Devices
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AD7280 Datasheet PDF : 33 Pages
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Preliminary Technical Data
AD7280
Vin6
Vin5
Vin4
Vin3
Vin2
Vin1
Vin0
ADC Vin+
ADC Vin-
Figure 5. MUX Configuration During Vin2-Vin1 Sampling
The ADC is a 12-bit successive approximation analog-to-digital
converter. The converter is composed of a comparator, SAR,
some control logic and 2 capacitive DACs. Figure 6 shows a
simplified schematic of the converter. During the acquisition
phase switches SW1, SW2 and SW3 are closed. The sampling
capacitor array acquires the signal on the input during this
phase.
VIN+
VIN–
B
CS
A SW1
A SW2
B
CS
CAPACITIVE
DAC
COMPARATOR
SW3
CONTROL
LOGIC
CAPACITIVE
DAC
Figure 6. ADC Configuration During Acquisition Phase
When the ADC starts a conversion (Figure 7), SW3 opens and
SW1 and SW2 move to position B, causing the comparator to
become unbalanced. The control logic and capacitive DACs are
used to add and subtract fixed amounts of charge to bring the
comparator back into a balanced condition. When the
comparator is rebalanced, the conversion is complete. The
control logic generates the ADC output code. This output code
is then stored in the appropriate register for the input that has
been converted.
ANALOG INPUT STRUCTURE
Figure 8 shows the equivalent circuit of the analog input
structure of the AD7280. The two diodes provide ESD
protection. The resistors are lumped components made up of
the on-resistance of the input multiplexer and the track-and-
hold switch. The value of these resistors is typically about 300Ω.
Capacitor C1 can primarily be attributed to pin capacitance
while Capacitor C2 is the sampling capacitor of the ADC. The
total lumped capacitance of C1 and C2 is approximately 13 pF.
VDD
VIN+
D
C1
D
R1 C2
VSS
VDD
VIN–
D
C1
D
R1 C2
VSS
Figure 8. Equivalent Analog Input Circuit
TRANSFER FUNCTION
The output coding of the AD7280 is straight binary. The
designed code transitions occur at successive integer LSB values
(that is, 1 LSB, 2 LSB, and so on). The LSB size is dependent on
whether the voltage or temperature inputs are being measured.
The analog input range of the voltage inputs is 1V to 5V, the
analog input range of the temperature inputs is 0V to 5V. The
ideal transfer characteristic is shown in Figure 9.
Table 5. LSB Sizes for Each Analog Input Range
Selected
inputs
Input
Range
Full-Scale LSB Size
Range
Voltage
1 V to 5 V 4 V/4096 976 µV
Temperature 0 V to 5 V 5 V/4096 1.22 mV
VIN+
VIN–
B
CS
A SW1
A SW2
B
CS
CAPACITIVE
DAC
COMPARATOR
SW3
CONTROL
LOGIC
CAPACITIVE
DAC
Figure 7. ADC Configuration During Conversion Phase
111...111
111...110
111...000
011...111
000...010
000...001
000...000
Rev. PrD | Page 11 of 33
1V + 1LSB
AGND + 1LSB
5V – 1LSB
5V – 1LSB
ANALOG INPUT
4V INPUT RANGE
5V INPUT RANGE
Figure 9. Transfer Characteristic
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