AD8003ACHIPS 데이터 시트보기 (PDF) - Analog Devices
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AD8003ACHIPS Datasheet PDF : 16 Pages
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AD8003
80
60
VS = ±5V VS = +5V
40
20
0
–20
–40
–60
–5 –4 –3 –2 –1 0 1 2 3 4 5
VCM (V)
Figure 28. Offset Voltage vs. Input Common-Mode Range
10
8
VS = +5V
6
4
VS = ±5V
2
0
–2
–4
–6
–8
–10
–5 –4 –3 –2 –1 0 1 2 3 4 5
VOUT (V)
Figure 29. Inverting Input Bias Current Linearity
10 G = +2
9
RVSL
=
=
150Ω
±5V
8
7
6
IDIS
5
4
3
2
ICC
1
0
–5 –4 –3 –2 –1 0 1 2 3 4
POWER DOWN PIN VOLTAGE (VDIS (V))
200
150
100
50
0
–50
–100
–150
–200
–250
–300
5
Figure 30. POWER DOWN Pin Current and Supply Current vs.
POWER DOWN Pin Voltage
Data Sheet
20
15
10 VS = ±5V
VS = +5V
5
0
–5
–10
–15
–20
–5 –4 –3 –2 –1 0
1
2
3
4
5
VCM (V)
Figure 31. Noninverting Input Bias Current vs. Common-Mode Range
6
VDIS (VS = ±5V)
G = +2
RVILN==105.05ΩV dc
5
4
3
VDIS (VS = +5V)
2
VOUT (VS = +5V)
VOUT (VS = ±5V)
VOUT (VS = +5V)
1
VOUT (VS = ±5V)
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
TIME (µs)
Figure 32. Disable Switching Time for Various Supplies
10 G = +2
40
9
RVSL
=
=
150Ω
5V
30
8
20
7
ICC
IDIS
10
6
0
5
–10
4
–20
3
–30
2
–40
1
–50
0
–60
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
POWER DOWN PIN VOLTAGE (VDIS (V))
Figure 33. POWER DOWN Pin Current and Supply Current vs.
POWER DOWN Pin Voltage
Rev. C | Page 10 of 16
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