AD812–SPECIFICATIONS
Single Supply (Continued)
Model
DC PERFORMANCE
Input Offset Voltage
Offset Drift
–Input Bias Current
+Input Bias Current
Open-Loop Voltage Gain
Open-Loop Transresistance
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common Mode
Voltage Range
Common-Mode Rejection Ratio
Input Offset Voltage
–Input Current
+Input Current
Input Offset Voltage
–Input Current
+Input Current
Conditions
TMIN –TMAX
TMIN –TMAX
TMIN –TMAX
VO = +2.5 V p-p
VO = +0.7 V p-p
VO = +2.5 V p-p
VO = +0.7 V p-p
+Input
–Input
+Input
VCM = 1.25 V to 3.75 V
VCM = 1 V to 2 V
VS
Min
+5 V, +3 V
+5 V, +3 V
+5 V, +3 V
+5 V, +3 V
+5 V
67
+3 V
+5 V
250
+3 V
+5 V
+5 V
+5 V
1.0
+3 V
1.0
+5 V
52
+3 V
OUTPUT CHARACTERISTICS
Output Voltage Swing p-p
Output Current
Short Circuit Current
MATCHING CHARACTERISTICS
Dynamic
Crosstalk
Gain Flatness Match
DC
Input offset Voltage
–Input Bias Current
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
Input Offset Voltage
–Input Current
+Input Current
RL = 1 kΩ, TMIN –TMAX
+5 V
3.0
RL = 150 Ω, TMIN –TMAX
+5 V
2.8
+3 V
1.0
+5 V
20
+3 V
15
G = +2, RF = 715 Ω
VIN = 1 V
+5 V
G = +2, f = 5 MHz
G = +2, f = 20 MHz
TMIN –TMAX
TMIN –TMAX
Per Amplifier
TMIN –TMAX
VS = +3 V to +30 V
+5 V, +3 V
+5 V, +3 V
+5 V, +3 V
+5 V, +3 V
2.4
+5 V
+3 V
+5 V
70
TRANSISTOR COUNT
NOTES
1Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain.
2Single supply differential gain and phase are measured with the ac coupled circuit of Figure 53.
Specifications subject to change without notice.
AD812A
Typ
Max
1.5
4.5
7.0
7
2
20
30
0.2
1.5
2.0
73
70
400
300
15
90
2
4.0
2.0
55
3
5.5
0.1
0.2
52
3.5
0.1
3.2
3.1
1.3
30
25
40
–72
0.1
0.5
3.5
2
25
36
3.2
4.0
3.0
3.5
4.5
80
0.3
0.6
0.005 0.05
56
–4–
Units
mV
mV
µV/°C
µA
µA
µA
µA
dB
dB
kΩ
kΩ
MΩ
Ω
pF
V
V
dB
µA/V
µA/V
dB
µA/V
µA/V
V p-p
V p-p
V p-p
mA
mA
mA
dB
dB
mV
µA
V
mA
mA
mA
dB
µA/V
µA/V
REV. B