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AD8469WBRMZ 데이터 시트보기 (PDF) - Analog Devices

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AD8469WBRMZ Datasheet PDF : 12 Pages
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AD8469
MINIMUM INPUT SLEW RATE REQUIREMENT
With the rated load capacitance and normal good PCB design
(see the Power/Ground Layout and Bypassing section), the
AD8469 comparator should be stable at any input slew rate with
no hysteresis. Broadband noise from the input stage is observed
in place of the excessive chatter that is seen with most other high
speed comparators.
Data Sheet
With additional capacitive loading or poor bypassing, oscillation
may be encountered. These oscillations are due to the high gain
bandwidth of the comparator in combination with feedback
through parasitics in the package and PCB. In many applications,
chatter is not harmful.
Rev. 0 | Page 10 of 12

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