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AD8567(RevA) 데이터 시트보기 (PDF) - Analog Devices

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AD8567
(Rev.:RevA)

16 V Rail-to-Rail Operational Amplifiers

Analog Devices

AD8567 Datasheet PDF : 12 Pages

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AD8565/AD8566/AD8567

APPLICATIONS

Theory of Operation

The AD856x family is designed to drive large capacitive loads in

LCD applications. It has high output current drive, rail-to-rail

input/output operation and is powered from a single 16 V supply.

It is also intended for other applications where low distortion and

high output current drive are needed.

Figure 1 illustrates a simplified equivalent circuit for the AD856x.

The rail-to-rail bipolar input stage is composed of two PNP

differential pairs, Q4–Q5 and Q10–Q11, operating in series with

diode protection networks, D1–D2. Diode network D1–D2

serves as protection against large transients for Q4–Q5, to

accommodate rail-to-rail input swing. D5–D6 protect Q10–Q11

against zenering. In normal operation, Q10–Q11 are off and their

input stage is buffered from the operational amplifier inputs by

Q6–D3 and Q8–D4. Operation of the input stage is best understood

as a function of applied common-mode voltage: When the inputs

of the AD856x are biased midway between the supplies, the

differential signal path gain is controlled by resistive loads (Via R9,

R10) Q4–Q5. As the input common-mode level is reduced toward

the negative supply (VNEG or GND), the input transistor current

sources, I1 and I2, are forced into saturation, thereby forcing the

Q6–D3 and Q8–D4 networks into cutoff; However, Q4–Q5 remain

active, providing input stage gain. Inversely, when common-mode

input voltage is increased toward the positive supply, Q4–Q5 are

driven into cutoff, Q3 is driven into saturation, and Q4 becomes

active, providing bias to the Q10–Q11 differential pair. The point

at which Q10–Q11 differential pair becomes active is approximately

equal to (VPOS – 1 V).

VPOS

BIAS LINE

V+

V–

Q10 C2 Q11

FOLDED

CASCADE

R10

VNEG

Figure 1. AD856x Equivalent Input Circuit

The benefit of this type of input stage is low bias current. The

input bias current is the sum of base currents of Q4–Q5 and

Q6–Q8 over the range from (VNEG + 1 V) to (VPOS – 1 V). Outside

of this range, input bias current is dominated by the sum of base

current of Q10–Q11 for input signals close to VNEG and of Q6–Q8

(Q10–Q11) for signal close to VPOS. From this type of design,

the input bias current of AD856x not only exhibits different

amplitude, but also exhibits different polarities. Figure 2 provides

the characteristics of the input bias current versus common-mode

voltage. It is important to keep in mind that the source impedances

driving the AD856x inputs are balanced for optimum dc and ac

performance.

1,000

800

600

VS = 16V

TA = 25؇C

400

200

–200

–400

–600

–800

–1,000

INPUT COMMON-MODE VOLTAGE – V

Figure 2. AD856x Input Bias Current vs. Common-Mode

Voltage

In order to achieve rail-to-rail output performance, the AD856x

design uses a complementary common-source (or gmRL) output.

This configuration allows output voltages to approach the power

supply rails, particularly if the output transistors are allowed to

enter the triode region on extremes of signal swing which are

limited by VGS, the transistor sizes, and output load current.

Also, this type of output stage exhibits voltage gain in an open-loop

gain configuration. The amount of gain depends on the total

load resistance at the output of the AD856x.

Input Overvoltage Protection

As with any semiconductor device, whenever the input exceeds

either supply voltages, attention needs to be paid to the input

overvoltage characteristics. As an overvoltage occurs, the amplifier

could be damaged, depending on the voltage level and the magnitude

of the fault current. When the input voltage exceeds either supply

by more than 0.6 V, internal pn junctions will allow current to

flow from the input to the supplies.

This input current is not inherently damaging to the device as

long as it is limited to 5 mA or less. If a condition exists using

the AD856x where the input exceeds the supply more than 0.6 V,

a series external resistor should be added. The size of the resistor

can be calculated by using the maximum overvoltage divided by

5 mA. This resistance should be placed in series with either input

exposed to an overvoltage.

–8–

REV. A

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