AD9272
AD9272-40
Parameter 1
Conditions
Min Typ
IAVDD1
Full-channel
210
mode
CW Doppler mode
32
with four channels
enabled
IAVDD2
Full-channel mode
365
CW Doppler mode
140
with four channels
enabled
IDRVDD
49
Total Power
Dissipation
Includes output
drivers, full-
channel mode, no
signal
1560
CW Doppler mode
475
with four channels
enabled
Power-Down
Dissipation
Standby Power
Dissipation
Power Supply
1.6
Rejection Ratio
(PSRR)
ADC RESOLUTION
12
ADC REFERENCE
Output Voltage Error VREF = 1 V
Load Regulation
At 1.0 mA,
2
VREF = 1 V
Input Resistance
6
AD9272-65
Max Min Typ
280
32
365
140
1713
51
1690
475
5
175
1.6
12
±20
2
6
AD9272-80
Max Min Typ
335
32
365
140
1860
52
1780
475
5
200
1.6
12
±20
2
6
Max Unit
mA
mA
mA
mA
mA
1975 mW
mW
5
mW
210 mW
mV/V
Bits
±20 mV
mV
kΩ
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and information about how these tests were
completed.
2 SE = single-ended.
3 AAF settings < 5 MHz are out of range and not supported.
4 The overrange condition is specified as being 6 dB more than the full-scale input range.
Rev. C | Page 7 of 44