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AD9865 데이터 시트보기 (PDF) - Analog Devices

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AD9865 Datasheet PDF : 48 Pages
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AD9865
Parameter
Tx DIGITAL FILTER CHARACTERISTICS (4× Interpolation)
Latency (Relative to 1/ FDAC)
−0.2 dB Bandwidth
−3 dB Bandwidth
Stop Band Rejection (0.289 fOSCIN to 0.711 fOSCIN)
PLL CLK MULTIPLIER
OSCIN Frequency Range
Internal VCO Frequency Range
Duty Cycle
OSCIN Impedance
CLKOUT1 Jitter5
CLKOUT2 Jitter6
CLKOUT1 and CLKOUT2 Duty Cycle7
Temp Test Level Min
Full V
Full V
Full V
Full V
Full IV
5
Full IV
20
Full II
40
25°C V
25°C III
25°C III
Full III
45
Typ
Max Unit
96
0.1095
0.1202
50
Cycles
fOUT/fDAC
fOUT /fDAC
dB
80
200
60
100//3
12
6
55
MHz
MHz
%
ΜΩ/pF
ps rms
ps rms
%
1 Gain error and gain temperature coefficients are based on the ADC only (with a fixed 1.23 V external reference and a 1 V p-p differential analog input).
2 TxDAC IOUTFS = 20 mA, differential output with 1:1 transformer with source and load termination of 50 Ω, FOUT = 5 MHz, 4x interpolation.
3 IOUN full-scale current = 80 mA, fOSCIN = 80 MHz, fDAC =160 MHz, 2x interpolation.
4 Use external amplifier to drive additional load.
5 Internal VCO operates at 200 MHz , set to divide-by-1.
6 Because CLKOUT2 is a divided down version of OSCIN, its jitter is typically equal to OSCIN.
7 CLKOUT2 is an inverted replica of OSCIN, if set to divide-by-1.
Rx PATH SPECIFICATIONS
AVDD = 3.3 V ± 5%, DVDD = CLKVDD = DRVDD = 3.3 V ± 10%; half- or full-duplex operation with CONFIG = 0 default power bias
settings, unless otherwise noted.
Table 2.
Parameter
Rx INPUT CHARACTERISTICS
Input Voltage Span (RxPGA Gain = −10 dB)
Input Voltage Span (RxPGA Gain = +48 dB)
Input Common-Mode Voltage
Differential Input Impedance
Input Bandwidth (with RxLPF Disabled, RxPGA = 0 dB)
Input Voltage Noise Density (RxPGA Gain = 36 dB, f−3 dBF = 26 MHz)
Input Voltage Noise Density (RxPGA Gain = 48 dB, f−3 dBF = 26 MHz)
RxPGA CHARACTERISTICS
Minimum Gain
Maximum Gain
Gain Step Size
Gain Step Accuracy
Gain Range Error
RxLPF CHARACTERISTICS
Cutoff Frequency (f−3 dBF ) Range
Attenuation at 55.2 MHz with f−3 dBF = 21 MHz
Pass-Band Ripple
Settling Time to 5 dB RxPGA Gain Step @ fADC = 50 MSPS
Settling Time to 60 dB RxPGA Gain Step @ fADC = 50 MSPS
ADC DC CHARACTERISTICS
Resolution
Conversion Rate
Temp
Full
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Full
25°C
25°C
25°C
25°C
NA
Full
Test Level Min Typ Max Unit
III
6.33
V p-p
III
8
mV p-p
III
1.3
V
III
400
4.0
pF
III
53
MHz
III
3.0
nV/rtHz
III
2.4
nV/rtHz
III
−12
dB
III
48
dB
III
1
dB
III
Monotonic
dB
III
0.5
dB
III
15
35
MHz
III
20
dB
III
±1
dB
III
20
ns
III
100
ns
NA
10
Bits
II
5
80
MSPS
Rev. A | Page 4 of 48

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