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TDA4866 데이터 시트보기 (PDF) - Philips Electronics

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TDA4866 Datasheet PDF : 20 Pages
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Philips Semiconductors
Full bridge current driven vertical deflection
booster
Product specification
TDA4866
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
V4,3
output B saturation voltage to VP
I4 = 0.7 A
1.0
1.6
V
I4 = 1.0 A
1.3
1.9
V
LE
linearity error
Idefl = ±0.7 A; note 4
2
%
V4
DC output voltage
Iid = 0 A; closed-loop 6.6
7.2
7.8
V
V6
DC output voltage
Iid = 0 A; closed-loop 6.6
7.2
7.8
V
Goi
open-loop current gain (I4, 6/Iid)
I4, 6 < 100 mA; note 5
100
dB
Gofb
open-loop current gain (I4, 6/I9)
I4, 6 < 100 mA; note 5
100
dB
Gifb
current ratio (Iid/I9)
closed-loop
0.2
dB
Idefl(ripple) output ripple current as a function of VP(ripple) = ±0.5 V;
±1
mA
supply ripple
Iid = 0; closed-loop
Flyback generator
V7, 6
voltage drop during flyback
reverse
forward
V6
switching on threshold voltage
V6
switching off threshold voltage
I7
flyback current during flyback
Idefl = 0.7 A
Idefl = 1.0 A
Idefl = 0.7 A
Idefl = 1.0 A
2.0
2.3
+5.6
+5.9
VP 1
VP 1.5
3.0
V
3.5
V
+6.1 V
+6.5 V
VP + 1.5 V
VP + 1 V
±1
A
Guard circuit
V8
output voltage
guard on
7.5
8.5
10
V
V8
output voltage
guard on; VP = 8.2 V 6.9
VP 0.4 V
I8
output current
guard on
5
mA
V8
output voltage
guard off
0.4
V
I8
output current
guard off; V8 = 5 V
0.5
1
1.5
mA
V8(ext.)
allowable external voltage on pin 8
0
13
V
VP 13 V
0
VP + 0.3 V
Notes
1. Up to 60 V VFB 40 V a decoupling capacitor CFB = 22 µF (between pins 7 and 5) and a resistor RFB = 100
(between pin 7 and VFB) are required (see Fig.7).
2.
3.
Saturation
Di = I--Id--i-ed--f-c-l-c
voltages of
× I--Id--i-ed--f-l with
output
Ideflc =
stages A
common
and B
mode
can be increased
deflection current
in the event of negative input currents I1,
and Iidc = common mode input current.
2
<
500
µA.
4. Deviation of the output slope at a constant input slope.
5. Frequency behaviour of Goi and Gofb:
a) 3 dB open-loop bandwidth (45°) at 15 kHz; second pole (135°) at 1.3 MHz.
b) Open-loop gain at second pole (135°) 55 dB.
2001 Aug 07
7

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