AD9913 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
AD9913 Datasheet PDF : 32 Pages
| |||
Data Sheet
–50
–55
–60
–65
39.88%
–70
26.58%
–75
10.21%
–80
–85
–90
0
50
100
150
200
250
SYSTEM CLOCK (MHz)
Figure 10. SFDR vs. System Clock Frequency (PLL Bypassed)
–100
–110
–120
92.3MHz
48.9MHz
23.1MHz
6.1MHz
–130
–140
–150
–160
–170
10
100
1k
10k 100k
1M
10M 100M
FREQUENCY (MHz)
Figure 11. Residual Phase Noise vs. fOUT (PLL Bypassed)
AD9913
−50
−60
−70
−80
−90
−100
−110
99MHz
49MHz
−120
−130
−140
25MHz
12.5MHz
−150
100
1k
10k
100k
1M
10M
100M
FREQUENCY (MHz)
Figure 12. Absolute Phase Noise vs. fOUT Using the Internal PLL
(REF_CLK 25 MHz × 10 = 250 MHz Using PLL)
–50
PLL ×10
–55
REFSPUR
–60
BYPASS
–65
–70
–75
–80
–85
–90
0
0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45
fOUT (% of System Clock)
Figure 13. SFDR Without the Internal PLL
(REF_CLK = 25 MHz × 10 = 250 MHz Using PLL, 4 mA DAC Full-Scale Current)
Rev. D | Page 9 of 32
Share Link: 