EVAL-ADCMP563BRQZ(RevD) 데이터 시트보기 (PDF) - Analog Devices

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EVAL-ADCMP563BRQZ
(Rev.:RevD)

Dual, High Speed ECL Comparators

Analog Devices 

ADCMP563/ADCMP564

Data Sheet

Parameter

AC PERFORMANCE (Continued)

Equivalent Input Rise Time Bandwidth1

Maximum Toggle Rate

Minimum Pulse Width

RMS Random Jitter

Unit to Unit Propagation Delay Skew

POWER SUPPLY

Positive Supply Current

Negative Supply Current

Positive Supply Voltage

Negative Supply Voltage

Power Dissipation

DC Power Supply Rejection Ratio—VCC

DC Power Supply Rejection Ratio—VEE

HYSTERESIS (ADCMP564 Only)

Hysteresis

Hysteresis Pin Bias Voltage

Hysteresis Pin Series Resistance

Symbol Conditions

Min Typ Max Unit

BWEQ

0 V to 1 V swing, 2 V/ns

1500

MHz

>50% output swing, 50% duty cycle

800

MHz

PWMIN

ΔtPD < 25 ps

700

ps

VOD = 400 mV, 1.3 V/ns, 312 MHz,

50% duty cycle

1.0

ps

100

ps

IVCC

IVEE

VCC

VEE

PD

PSRRVCC

PSRRVEE

@ +5.0 V

@ −5.2 V

Dual

Dual

Dual, without load

Dual, with load

2

3.2

10

19

4.75 5.0

−4.96 −5.2

90

120

150 180

85

85

5

mA

25

mA

5.25 V

−5.45 V

150 mW

230 mW

dB

dB

RHYS = 23.5 kΩ

RHYS = 9.0 kΩ

Referred to AGND

20

mV

70

mV

−1

V

3

kΩ

1 Equivalent input rise time bandwidth assumes a first-order input response and is calculated by the following formula: BWEQ = 0.22/√(trCOMP2 – trIN2), where trIN is the

20/80 input transition time applied to the comparator and trCOMP is the effective transition time, as digitized by the comparator input.

Rev. D | Page 4 of 15

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