EVAL-ADCMP563BRQZ(RevD) 데이터 시트보기 (PDF) - Analog Devices
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EVAL-ADCMP563BRQZ Datasheet PDF : 15 Pages
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ADCMP563/ADCMP564
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
QA 1
16 QB
QA 2
15 QB
GND 3
LEA 4
LEA 5
VEE 6
–INA 7
ADCMP563
BRQ
TOP VIEW
(Not to Scale)
14 GND
13 LEB
12 LEB
11 VCC
10 –INB
+INA 8
9 +INB
–INA 1
+INA 2
+INB 3
–INB 4
ADCMP563
BCP
TOP VIEW
(Not to Scale)
12 QA
11 QA
10 QB
9 QB
Figure 5. ADCMP563 16-Lead QSOP
Pin Configuration
GND 1
20 GND
QA 2
19 QB
QA 3
GND 4
LEA 5
LEA 6
18 QB
ADCMP564 17 GND
BRQ
TOP VIEW 16 LEB
(Not to Scale) 15 LEB
VEE 7
–INA 8
14 VCC
13 –INB
+INA 9
12 +INB
HYSA 10
11 HYSB
Figure 6. ADCMP564 20-Lead QSOP
Pin Configuration
NOTES
1. THE EXPOSED PAD SHOULD BE EITHER CONNECTED TO VEE OR LEFT FLOATING.
Figure 7. ADCMP563 16-Lead LFCSP
Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
ADCMP563 ADCMP563 ADCMP564
16-Lead
16-Lead
20-Lead
QSOP
LFCSP
QSOP
1
1
11
2
2
12
3
3
13
4
4
14
5
5
15
6
Mnemonic
GND
QA
QA
GND
LEA
LEA
Function
Analog Ground.
One of Two Complementary Outputs for Channel A. QA is logic high if the
analog voltage at the noninverting input is greater than the analog voltage
at the inverting input (provided the comparator is in compare mode). See
the description of the LEA pin for more information.
One of Two Complementary Outputs for Channel A. QA is logic low if the
analog voltage at the noninverting input is greater than the analog voltage
at the inverting input (provided the comparator is in compare mode). See
the description of the LEA pin for more information.
Analog Ground.
One of Two Complementary Inputs for Channel A Latch Enable. In compare
mode (logic high), the output tracks change at the input of the comparator.
In latch mode (logic low), the output reflects the input state just prior to the
comparator being placed in the latch mode. LEA must be driven in
conjunction with LEA. If left unconnected, the comparator defaults to
compare mode.
One of Two Complementary Inputs for Channel A Latch Enable. In compare
mode (logic low), the output tracks change at the input of the comparator.
In latch mode (logic high), the output reflects the input state just prior to the
Rev. D | Page 6 of 15
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