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EVAL-ADCMP564BRQ 데이터 시트보기 (PDF) - Analog Devices

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EVAL-ADCMP564BRQ
ADI
Analog Devices ADI
EVAL-ADCMP564BRQ Datasheet PDF : 16 Pages
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ADCMP563/ADCMP564
TIMING INFORMATION
LATCH ENABLE
LATCH ENABLE
DIFFERENTIAL
VIN
INPUT VOLTAGE
Q OUTPUT
Q OUTPUT
tS
tH
VOD
tPDL
tPL
tPLOH
tPDH
tF
tPLOL
tR
Figure 20. System Timing Diagram
50%
VREF ± VOS
50%
50%
Figure 20 shows the compare and latch features of the ADCMP563. Table 4 describes the terms in the diagram.
Table 4. Timing Descriptions
Symbol Timing
tPDH
Input-to-Output High Delay
tPDL
Input-to-Output Low Delay
tPLOH
Latch Enable to Output High Delay
tPLOL
Latch Enable to Output Low Delay
tH
Minimum Hold Time
tPL
Minimum Latch Enable Pulse Width
tS
Minimum Setup Time
tR
Output Rise Time
tF
Output Fall Time
VOD
Voltage Overdrive
Description
Propagation delay measured from the time the input signal crosses the reference (± the
input offset voltage) to the 50% point of an output low-to-high transition.
Propagation delay measured from the time the input signal crosses the reference (± the
input offset voltage) to the 50% point of an output high-to-low transition.
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output low-to-high transition.
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output high-to-low transition.
Minimum time after the negative transition of the latch enable signal that the input signal
must remain unchanged to be acquired and held at the outputs.
Minimum time the latch enable signal must be high to acquire an input signal change.
Minimum time before the negative transition of the latch enable signal that an input
signal change must be present to be acquired and held at the outputs.
Amount of time required to transition from a low to a high output as measured at the
20% and 80% points.
Amount of time required to transition from a high to a low output as measured at the
20% and 80% points.
Difference between the differential input and reference input voltages.
Rev. B | Page 10 of 16

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