EVAL-ADCMP609BRMZ(RevC) 데이터 시트보기 (PDF) - Analog Devices

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EVAL-ADCMP609BRMZ
(Rev.:RevC)

Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator

Analog Devices 

Data Sheet

INPUT VOLTAGE

500mV OVERDRIVE

10mV OVERDRIVE

VN ± VOS

DISPERSION

Q/Q OUTPUT

Figure 12. Propagation Delay—Overdrive Dispersion

INPUT VOLTAGE

1V/ns

10V/ns

VN ± VOS

DISPERSION

Q/Q OUTPUT

Figure 13. Propagation Delay—Slew Rate Dispersion

COMPARATOR HYSTERESIS

The addition of hysteresis to a comparator is often desirable in a

noisy environment, or when the differential input amplitudes

are relatively small or slow moving. The transfer function for a

comparator with hysteresis is shown in Figure 14. As the input

voltage approaches the threshold (0.0 V, in Figure 14) from below

the threshold region in a positive direction, the comparator

switches from low to high when the input crosses +VH/2. The new

switching threshold becomes −VH/2. The comparator remains in

the high state until the threshold, −VH/2, is crossed from below the

threshold region in a negative direction. In this manner, noise or

feedback output signals centered on 0.0 V input cannot cause

the comparator to switch states unless it exceeds the region

bounded by ±VH/2.

OUTPUT

VOH

VOL

–VH

0.0V

2

+VH INPUT

2

Figure 14. Comparator Hysteresis Transfer Function

ADCMP609

The customary technique for introducing hysteresis into a

comparator uses positive feedback from the output back to the

input. One limitation of this approach is that the amount of

hysteresis varies with the output logic levels, resulting in

hysteresis that is not symmetric about the threshold. The

external feedback network can also introduce significant

parasitics that reduce high speed performance and can even

induce oscillation in some cases.

The ADCMP609 comparator offers a programmable hysteresis

feature that significantly improves accuracy and stability.

Connecting an external pull-down resistor or a current source

from the HYS pin to ground varies the amount of hysteresis in a

predictable, stable manner. Leaving the HYS pin disconnected

or driving it high removes the hysteresis. The maximum

hysteresis that can be applied using this pin is approximately

160 mV. Figure 15 illustrates the amount of hysteresis applied as

a function of the external resistor value.

160

150

140

130

120

110

100

90

80

70

60

50

40

30

20

10

0

0

VCC = 2.5

VCC = 5.5

100 200 300 400 500 600 700 800 900 1000 1100 1200 1300

HYS RESISTOR (kΩ)

Figure 15. Hysteresis vs. HYS Resistor

The HYS pin appears as a 1.25 V bias voltage seen through a

series resistance of 7 kΩ ± 20% throughout the hysteresis control

range. The advantages of applying hysteresis in this manner are

improved accuracy, improved stability, reduced component

count, and maximum versatility. An external bypass capacitor is

not recommended on the HYS pin because it impairs the latch

function and often degrades the jitter performance of the device.

With the pin driven low, hysteresis may become large, but in this

device, the effect is not reliable or intended as a latch function.

CROSSOVER BIAS POINT

Rail-to-rail inputs of this type, in both op amps and comparators,

have a dual front-end design. Certain devices are active near the

VCC rail, and others are active near the VEE rail. At some predeter-

mined point in the common-mode range, a crossover occurs. At

this point, normally VCC/2, the direction of the bias current reverses

and there are changes in measured offset voltages and currents.

The ADCMP609 slightly elaborates on this scheme. The

crossover points are at approximately 0.8 V and 1.6 V.

Rev. C | Page 9 of 12

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