ADCMP609 데이터 시트보기 (PDF) - Analog Devices

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ADCMP609

Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator

Analog Devices 

ADCMP609

Propagation delay dispersion is a specification that becomes

important in high speed, time-critical applications, such as data

communication, automatic test and measurement, and instru-

mentation. It is also important in event-driven applications, such

as pulse spectroscopy, nuclear instrumentation, and medical

imaging. Dispersion is defined as the variation in propagation

delay as the input overdrive conditions are changed (see

Figure 12 and Figure 13).

ADCMP609 dispersion is typically <12 ns as the overdrive varies

from 10 mV to 125 mV. This specification applies to both

positive and negative signals because the device has very closely

matched delays for both positive-going and negative-going

inputs, and very low output skews. Remember to add the

actual device offset to the overdrive for repeatable dispersion

measurements.

500mV OVERDRIVE

INPUT VOLTAGE

10mV OVERDRIVE

VN ± VOS

DISPERSION

Q/Q OUTPUT

Figure 12. Propagation Delay—Overdrive Dispersion

INPUT VOLTAGE

1V/ns

10V/ns

VN ± VOS

DISPERSION

Q/Q OUTPUT

Figure 13. Propagation Delay—Slew Rate Dispersion

COMPARATOR HYSTERESIS

The addition of hysteresis to a comparator is often desirable in

a noisy environment, or when the differential input amplitudes

are relatively small or slow moving. The transfer function for a

comparator with hysteresis is shown in Figure 14. As the input

voltage approaches the threshold (0.0 V, in this example) from

below the threshold region in a positive direction, the compara-

tor switches from low to high when the input crosses +VH/2. The

new switching threshold becomes −VH/2. The comparator remains

in the high state until the threshold, −VH/2, is crossed from

below the threshold region in a negative direction. In this manner,

noise or feedback output signals centered on 0.0 V input cannot

cause the comparator to switch states unless it exceeds the region

bounded by ±VH/2.

OUTPUT

VOH

VOL

0

–VH

2

INPUT

+VH

2

Figure 14. Comparator Hysteresis Transfer Function

The customary technique for introducing hysteresis into a

comparator uses positive feedback from the output back to

the input. One limitation of this approach is that the amount

of hysteresis varies with the output logic levels, resulting in

hysteresis that is not symmetric about the threshold. The

external feedback network can also introduce significant

parasitics that reduce high speed performance and can

even induce oscillation in some cases.

The ADCMP609 comparator offers a programmable hysteresis

feature that significantly improves accuracy and stability. Con-

necting an external pull-down resistor or a current source from

the HYS pin to GND varies the amount of hysteresis in a pre-

dictable, stable manner. Leaving the HYS pin disconnected or

driving it high removes the hysteresis. The maximum hysteresis

that can be applied using this pin is approximately 160 mV.

Figure 15 illustrates the amount of hysteresis applied as a

function of the external resistor value.

160

150

140

130

120

110

100

90

80

70

60

50

40

30

20

10

0

0

VCC = 2.5

VCC = 5.5

100 200 300 400 500 600 700 800 900 1000 1100 1200 1300

HYS RESISTOR (kΩ)

Figure 15. Hysteresis vs. HYS Resistor

The hysteresis control pin appears as a 1.25 V bias voltage seen

through a series resistance of 7 kΩ ± 20% throughout the hysteresis

control range. The advantages of applying hysteresis in this manner

are improved accuracy, improved stability, reduced component

count, and maximum versatility. An external bypass capacitor is

not recommended on the HYS pin because it impairs the latch

function and often degrades the jitter performance of the device.

Rev. 0 | Page 9 of 12

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