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ADF7025 데이터 시트보기 (PDF) - Analog Devices

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ADF7025 Datasheet PDF : 44 Pages
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ADF7025
Parameter
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINH/IINL
Input Capacitance, CIN
Control Clock Input
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
CLKOUT Rise/Fall
CLKOUT Load
TEMPERATURE RANGE, TA
POWER SUPPLIES
Voltage Supply
VDD
Transmit Current Consumption
−20 dBm
−10 dBm
0 dBm
10 dBm
Receive Current Consumption
Low Current Mode
High Sensitivity Mode
Power-Down Mode
Low Power Sleep Mode
Min
Typ
0.7 × VDD
DVDD − 0.4
−40
Max Unit
0.2 × VDD
±1
10
50
V
V
µA
pF
MHz
V
0.4
V
5
ns
10
pF
+85
°C
Test Conditions
IOH = 500 µA
IOL = 500 µA
2.3
3.6
V
All VDD pins must be tied together
FRF = 915 MHz, VDD = 3.0 V,
PA is matched in to 50 Ω
14.6
mA
15.8
mA
19.3
mA
28
mA
19
mA
21
mA
0.1
1
µA
1 Measured as maximum unmodulated power. Output power varies with both supply and temperature.
2 Sensitivity for combined matching network case is typically 2 dB less than separate matching networks.
3 Follow the matching and layout guidelines in the LNA/PA Matching section to achieve the relevant FCC/ETSI specifications.
Rev. A | Page 6 of 44

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