ADG2128 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
ADG2128 Datasheet PDF : 28 Pages
| |||
Data Sheet
ADG2128
I2C TIMING SPECIFICATIONS
VDD = 5 V to 12 V; VSS = −5 V to 0 V; VL = 5 V; GND = 0 V; TA = TMIN to TMAX, unless otherwise noted (see Figure 2).
Table 3.
Parameter1 Conditions
ADG2108 Limit at TMIN, TMAX
Min
Max
Unit
Description
fSCL
Standard mode
Fast mode
High speed mode2
100
kHz Serial clock frequency
400
kHz
CB = 100 pF maximum
CB = 400 pF maximum
t1
Standard mode
4
Fast mode
0.6
High speed mode2
3.4
MHz
1.7
MHz
µs
tHIGH, SCL high time
µs
CB = 100 pF maximum 60
CB = 400 pF maximum 120
t2
Standard mode
4.7
Fast mode
1.3
High speed mode2
ns
ns
µs
tLOW, SCL low time
µs
CB = 100 pF maximum 160
CB = 400 pF maximum 320
t3
Standard mode
250
Fast mode
100
High speed mode2
10
t4 3
Standard mode
0
Fast mode
0
High speed mode2
ns
ns
ns
tSU;DAT, data setup time
ns
ns
3.45
µs
tHD;DAT, data hold time
0.9
µs
CB = 100 pF maximum 0
CB = 400 pF maximum 0
t5
Standard mode
4.7
Fast mode
0.6
High speed mode2
160
70
ns
150
ns
µs
tSU;STA, setup time for a repeated start condition
µs
ns
t6
Standard mode
4
Fast mode
0.6
High speed mode2
160
µs
tHD;STA, hold time for a repeated start condition
µs
ns
t7
Standard mode
4.7
Fast mode
1.3
µs
tBUF, bus free time between a stop and a start condition
µs
t8
Standard mode
4
Fast mode
0.6
High speed mode2
160
µs
tSU;STO, setup time for a stop condition
µs
ns
t9
Standard mode
1000
ns
tRDA, rise time of SDA signal
Fast mode
20 + 0.1 CB
300
ns
High speed mode2
CB = 100 pF maximum 10
80
ns
CB = 400 pF maximum 20
160
ns
t10
Standard mode
300
ns
tFDA, fall time of SDA signal
Fast mode
20 + 0.1 CB
300
ns
High speed mode2
CB = 100 pF maximum 10
CB = 400 pF maximum 20
80
ns
160
ns
Rev. D | Page 7 of 28
Share Link: 