ADL5385 데이터 시트보기 (PDF) - Analog Devices
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ADL5385 Datasheet PDF : 26 Pages
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Data Sheet
ADL5385
BASIC CONNECTIONS
Figure 29 shows the basic connections for the ADL5385.
Power Supply and Grounding
All the VPS pins must be connected to the same 5 V source.
Adjacent pins of the same name can be tied together and decoupled
with a 0.1 µF capacitor. Locate these capacitors as close as possible
to the device. The power supply can range from 4.75 V to 5.5 V.
The COM1 pin, COM2 pin, and COM3 pin are tied to the same
ground plane through low impedance paths. The exposed
paddle on the underside of the package is also soldered to a low
thermal and electrical impedance ground plane. If the ground
plane spans multiple layers on the circuit board, they should be
stitched together with nine vias under the exposed paddle. The
Analog Devices AN-722 Application Note discusses the thermal
and electrical grounding of the LFCSP in greater detail.
Baseband Inputs
The baseband inputs QBBP, QBBN, IBBP, and IBBN must be
driven from a differential source. The nominal drive level of
1.4 V p-p differential (700 mV p-p on each pin) is biased to a
common-mode level of 500 mV dc.
The dc common-mode bias level for the baseband inputs can
range from 400 mV to 600 mV. This results in a reduction in
the usable input ac swing range. The nominal dc bias of 500 mV
allows for the largest ac swing, limited on the bottom end by the
ADL5385 input range and on the top end by the output
compliance range on most Analog Devices DACs.
QBBP
QBBN
LO Input
A single-ended LO signal is applied to the LOIP pin through
an ac coupling capacitor. The LO return pin, LOIN, must be
ac-coupled to ground though a low impedance path.
The LO input can be driven differentially, in which case both
sides of the differential LO source should be ac-coupled through
a pair of series capacitors to the LOIP and LOIN pins. The
nominal LO drive of −7 dBm, which is recommended, can be
increased to up to 5 dBm. For operation below 50 MHz, a
minimum LO drive level of 0 dBm should be used. The effect
of LO power on sideband suppression and carrier feedthrough
is shown in Figure 17 and Figure 21. The performance vs. LO
power at 30 MHz output frequency is shown at Figure 9.
RF Output
The RF output is available at the VOUT pin (Pin 7). This pin
must also be ac-coupled. Below 150 MHz, output power decreases
due to internal ac-coupling. This is shown in Figure 8. The
VOUT pin has a nominal broadband impedance of 50 Ω and
does not need further external matching.
IBBN
IBBP
CFPQ
OPEN
RFPQ
0Ω
RTQ
OPEN
RFNQ
0Ω
CFNQ
OPEN
CFNI
OPEN
RFNI
0Ω
RTI
OPEN
RFPI
0Ω
CFPI
OPEN
CLOP
LO
0.1µF
CLON
0.1µF
R11
0Ω
C11
OPEN
C12
0.1µF
VPOS
GND
19 COM3
20 COM3
21 LOIP
22 LOIN
23 VPS3
24 VPS3
ADL5385
4 × 4 LFCSP
EXPOSED PADDLE
ENBL 12
VPS2 11
TEMP 10
VPS1 9
VPS1 8
VOUT 7
ENB
R21
49.9Ω OFF
ON
SW21
ENBL
R13
0Ω
C16
0.1µF
R22
10kΩ
VPOS
C15
OPEN
RTEMP
200Ω
TEMP
R12
0Ω
C14
0.1µF
C13
OPEN
VPOS
VOUT
COUT
0.1µF
Figure 29. Basic Connections for the ADL5385
Rev. B | Page 15 of 26
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