ADM1060(RevPrJ) 데이터 시트보기 (PDF) - Analog Devices
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ADM1060 Datasheet PDF : 45 Pages
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ADM1060
PRELIMINARY TECHNICAL DATA
Pin Mnemonic
1
A0
2
A1
3
SDA
4
SCL
5
VDDCAP
6
GND
7
VCCP
8
VH
9-12 VP1-4
13-14 VB1-2
15-23 PDO_1-9
24
WDI
25-28 GPI_4-1
Reset,
PIN FUNCTION DESCRIPTION
Function
Logic input. Controls the 7th bit (LSB) of the 7 bit Serial Bus Address.
Logic input. Controls the 6th bit of the 7 bit Serial Bus Address.
Serial Bus data I/O pin. Open- Drain output. Requires 2.2k pullup resistor
Open- Drain Serial Bus Clock pin. Requires 2.2k pullup resistor
VDD bypass capacitor pin. A capacitor from this pin to GND stabilises the VDD Arbitrator.
0.1F is recommended for this function.
Ground. Connect to common of power supplies.
Reservoir Capacitor for Central Charge Pump. This charge pump powers all of the internal
circuits of the ADM1060 and provides the first stage in the tripler circuits used to produce
12V of gate drive on PDO’s 1- 4.
High Voltage Supply Input. 2 input ranges. A supply of between 2V and 6V or between
4.8V and 14.4V can be applied to this pin. The VDD arbitrator will select this supply to power
the ADM1060 if it is the highest supply supervised.
Positive Only Supply Inputs. 2 input ranges. A supply of between 1V and 3V or between
2V and 6V can be applied to this pin. The VDD arbitrator will select one of these supplies to
power the ADM1060 if it is the highest supply supervised.
Bipolar Supply Inputs. 2 modes. 2 input ranges in positive mode. 1 input range in negative
mode. A supply of between -6V and -2V can be applied to this pin when set in negative mode.
A supply of between 1V and 3V or between 2V and 6V can be applied to this pin when set in
positive mode.
Programmable Driver Output pin. All 9 can be programmed as logic outputs with multiple
pull-up options to VDD or VPn. PDO’s 1 to 4 can also provide a charge-pump generated
gate drive for external N- Channel FET
Watchdog Input. Used to monitor a processor clock and asserts a fault condition if the clock
fails to transition from low-to-high or high-to-low within a programmed timeout period (up to
18sec).
General Purpose Logic Input. TTL compatible Logic. Can be used as, say, a Manual
a Chip Enable pin or as an input for a control logic signal which may be critical to the power
up/down sequence of the supplies under control.
ABSOLUTE MAXIMUM RATINGS*
Voltage on VH Pin . . . . . . . . . . . . . . . . . . . . . . . . . . +17 V
Voltage on VP Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
Voltage on VB Pins . . . . . . . . . . . . . . . . . . . . . -7 V to +7V
Voltage on A0,A1 . . . . . . . . . . . . . . -0.3V to (VCC+0.3V)
Voltage on Any Other Input . . . . . . . . . . . . . . -0.3V to 6.5V
Input Current at any pin . . . . . . . . . . . . . . . . . . . . . . ±5mA
Package Input Current . . . . . . . . . . . . . . . . . . . . . . ±20mA
Maximum Junction Temperature (TJmax) . . . . . . .150 °C
Storage Temperature Range . . . . . . . . . –65°C to +150°C
Lead Temperature, Soldering
Vapor Phase 60 sec . . . . . . . . . . . . . . . . . . . . . . . +215°C
ESD Rating all pins . . . . . . . . . . . . . . . . . . . . . . . . 2000 V
A0 1
28 GPI1
A1 2
27 GPI2
SDA 3
26 GPI3
SCL 4
ADM1060
25 GPI4
VDDCAP 5
FT GND 6
A VCCP 7
DR UT VH 8
PINO VP1 9
24 WDI
23 PDO9
22 PDO8
21 PDO7
20 PDO6
VP2 10
19 PDO5
VP3 11
18 PDO4
VP4 12
17 PDO3
VB1 13
VB2 14
16 PDO2
15 PDO1
*Stresses above those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. This is a stress rating only;
functional operation of the device at these or any other conditions above
ADM1060 PIN CONFIGURATION
those indicated in the operational section of this specification is not
ORDERING GUIDE
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect device reliability.
THERMAL CHARACTERISTICS
Model
Temperature
Range
Package
Description
Package
Option
28-Pin TSSOP Package:
ADM1060ARU -40°C to +85°C 28-PinTSSOP RU-28
⍜JA = 98°C/Watt
–6–
REV. PrJ 11/02
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