ADM1069(RevC) 데이터 시트보기 (PDF) - Analog Devices
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ADM1069 Datasheet PDF : 32 Pages
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ADM1069
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
32
1
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
8
9
PIN 1
INDICATOR
ADM1069
TOP VIEW
(Not to Scale)
25
24
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
17
16
NC 1
VX1 2
VX2 3
VX3 4
VX4 5
NC 6
VP1 7
VP2 8
VP3 9
VH 10
PIN 1
INDICATOR
ADM1069
TOP VIEW
(Not to Scale)
30 PDO1
29 PDO2
28 PDO3
27 PDO4
26 PDO5
25 PDO6
24 PDO7
23 PDO8
22 NC
21 NC
Figure 3. LQFP Pin Configuration
NOTES
1. NC = NO CONNECT.
2. THE LFCSP HAS AN EXPOSED PAD ON THE BOTTOM.
THIS PAD IS A NO CONNECT (NC). IF POSSIBLE, THIS
PAD SHOULD BE SOLDERED TO THE BOARD FOR
IMPROVED MECHANICAL STABILITY.
Figure 4. LFCSP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
LQFP LFCSP1 Mnemonic
1, 6, 15, NC
16, 21,
22, 37, 38
1 to 4 2 to 5 VX1 to VX4 (VXx)
5 to 7 7 to 9 VP1 to VP3 (VPx)
8
10
VH
9
11
10
12
11
13
AGND2
REFGND2
REFIN
12
14
REFOUT
13 to 16
17 to 24
25
26
17 to 20
23 to 30
31
32
DAC1 to DAC4
PDO8 to PDO1
PDOGND2
VCCP
27
33
A0
28
34
A1
29
35
SCL
30
36
SDA
Description
No Connect.
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V
to 1.375 V. Alternatively, these pins can be used as general-purpose digital inputs.
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to these pins, the output of which connects to a supply
fault detector. These pins allow thresholds from 2.5 V to 6.0 V, from 1.25 V to 3.00 V, and from 0.573 V
to 1.375 V.
High Voltage Input to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to this pin, the output of which connects to a supply
fault detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.
Ground Return for Input Attenuators.
Ground Return for On-Chip Reference Circuits.
Reference Input for ADC. Nominally, 2.048 V. This pin must be driven by a reference voltage. The
on-board reference can be used by connecting the REFOUT pin to the REFIN pin. This is the normal
configuration.
2.048 V Reference Output. A reservoir capacitor must be connected between this pin and GND.
A 10 μF capacitor is recommended for this purpose.
Voltage Output DACs. These pins default to high impedance at power-up.
Programmable Output Drivers.
Ground Return for Output Drivers.
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this
pin and GND. A 10 μF capacitor is recommended for this purpose.
Logic Input. This pin sets the seventh bit of the SMBus interface address.
Logic Input. This pin sets the sixth bit of the SMBus interface address.
SMBus Clock Pin. Bidirectional open drain requires external resistive pull-up.
SMBus Data Pin. Bidirectional open drain requires external resistive pull-up.
Rev. C | Page 8 of 32
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