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ADM708SAN(RevA) 데이터 시트보기 (PDF) - Analog Devices

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ADM708SAN
(Rev.:RevA)
ADI
Analog Devices ADI
ADM708SAN Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
ADM706P/R/S/T, ADM708R/S/T
Power-Fail Comparator
The power-fail comparator is an independent comparator which
may be used to monitor the input power supply. The compara-
tor’s inverting input is internally connected to a 1.25 V reference
voltage. The noninverting input is available at the PFI input.
This input may be used to monitor the input power supply via a
resistive divider network. When the voltage on the PFI input drops
below 1.25 V, the comparator output (PFO) goes low indicating
a power failure. For early warning of power failure the compara-
tor may be used to monitor the preregulator input simply by
choosing an appropriate resistive divider network. The PFO output
can be used to interrupt the processor so that a shutdown proce-
dure is implemented before the power is lost.
INPUT
POWER
R1
1.25V
PFO
POWER-FAIL
POWER-FAIL PFI
OUTPUT
INPUT
ADM70x
R2
Figure 5. Power-Fail Comparator
Adding Hysteresis to the Power-Fail Comparator
For increased noise immunity, hysteresis may be added to the
power-fail comparator. Since the comparator circuit is nonin-
verting, hysteresis can be added simply by connecting a resistor
between the PFO output and the PFI input as shown in Figure
6. When PFO is low, resistor R3 sinks current from the sum-
ming junction at the PFI pin. When PFO is high, resistor R3
sources current into the PFI summing junction. This results in
differing trip levels for the comparator. Further noise immunity
may be achieved by connecting a capacitor between PFI and GND.
INPUT
POWER
+3.3V
ADM663A
VCC
R1
1.25V
PFO TO P NMI
PFI
ADM70x
R2
R3
VL
=
1. 25
+
R1

1. 25
R2
VCC – 1.
R3
25

V
MID
1.
25

R1 + R2
R2

Valid RESET Below 1 V VCC
The ADM70x family of products are guaranteed to provide a
valid reset level with VCC as low as 1 V. Please refer to the Typi-
cal Performance Characteristics. As VCC drops below 1 V, the
internal transistor will not have sufficient drive to hold it ON so
the voltage on RESET will no longer be held at 0 V. A pull-
down resistor as shown in Figure 7 may be connected externally
to hold the line low if it is required.
ADM70x
RESET
R1
GND
Figure 7. RESET Valid Below 1 V
Typical Performance Characteristics
VCC
RESET
400ms/DIV
Figure 8. ADM706/ADM708 RESET Output Voltage vs.
Supply Voltage
3.3V
PFO
0V
0V
VL
VH
VIN
Figure 6. Adding Hysteresis to the Power-Fail
Comparator
VH
=
1. 25
1

+

R2
R2
+
×
R3
R 3 
R1

VCC
RESET
400ms/DIV
Figure 9. RESET Output Voltage vs. Supply Voltage
–6–
REV. A

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