ADN2819(RevC) 데이터 시트보기 (PDF) - Analog Devices

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ADN2819
(Rev.:RevC)

Multirate to 2.7 Gbps Clock and Data Recovery IC with Integrated Limiting Amp

Analog Devices 

ADN2819

CHOOSING AC-COUPLING CAPACITORS

The choice of ac-coupling capacitors at the input (PIN, NIN) and

output (DATAOUTP, DATAOUTN) of the ADN2819 must be

chosen such that the device works properly at the lower OC-3

and higher OC-48 data rates. When choosing the capacitors, the

time constant formed with the two 50 Ω resistors in the signal

path must be considered. When a large number of consecutive

identical digits (CIDs) are applied, the capacitor voltage can

drop due to baseline wander (see Figure 23), causing pattern

dependent jitter (PDJ).

Data Sheet

For the ADN2819 to work robustly at both OC-3 and OC-48,

a minimum capacitor of 1.6 µF to PIN/NIN and 0.1 µF on

DATAOUTP/DATAOUTN must be used. This is based on the

assumption that 1000 CIDs must be tolerated and that the PDJ

must be limited to 0.01 UI p-p.

V1

CIN V2

PIN

ADN2819

+

50Ω

TIA

VREF LIMAMP

V1b CIN V2b

50Ω

CDR

NIN

COUT

DATAOUTP

COUT

DATAOUTN

1

2

V1

V1b

V2

V2b

VDIFF

VDIFF = V2–V2b

VTH = ADN2819 QUANTIZER THRESHOLD

3

4

VREF

VTH

NOTES

1. DURING DATA PATTERNS WITH HIGH TRANSITION DENSITY, DIFFERENTIAL DC VOLTAGE AT V1 AND V2 IS 0.

2. WHEN THE OUTPUT OF THE TIA GOES TO CID, V1 AND V1b ARE DRIVEN TO DIFFERENT DC LEVELS. V2 AND V2b DISCHARGE TO THE VREF LEVEL,

WHICH EFFECTIVELY INTRODUCES A DIFFERENTIAL DC OFFSET ACROSS THE AC COUPLING CAPACITORS.

3. WHEN THE BURST OF DATA STARTS AGAIN,THE DIFFERENTIAL DC OFFSET ACROSS THE AC COUPLING CAPACITORS IS APPLIED TO THE INPUT LEVELS,

CAUSING A DC SHIFT IN THE DIFFERENTIAL INPUT. THIS SHIFT IS LARGE ENOUGH SUCH THAT ONE OF THE STATES, EITHER HIGH OR LOW DEPENDING ON

THE LEVELS OF V1 AND V1b WHEN THE TIA WENT TO CID, IS CANCELLED OUT. THE QUANTIZER WILL NOT RECOGNIZE THIS AS A VALID STATE.

4. THE DC OFFSET SLOWLY DISCHARGES UNTIL THE DIFFERENTIAL INPUT VOLTAGE EXCEEDS THE SENSITIVITY OF THE ADN2819. THE QUANTIZER WILL BE

ABLE TO RECOGNIZE BOTH HIGH AND LOW STATES AT THIS POINT.

Figure 25. Example of Baseline Wander

Rev. C | Page 20 of 25

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