ADN4612 데이터 시트보기 (PDF) - Analog Devices

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ADN4612

11.3 Gbps, 12 × 12 Digital Crosspoint Switch

Analog Devices 

ADN4612

EEPROM MASTER I2C TIMING SPECIFICATIONS

Table 6.

Parameter1

EEPROM

Load from EEPROM Timeout

RESET to EEPROM Setup Time

EEPROM Pulse Width

START CONDITION

EEPROM Low Transition to Start Condition

STOP CONDITION

Stop Condition to LOS_IRQ Low Transition

LOS_IRQ

LOS_IRQ Pulse Width

1 Detailed functionality of this interface is described in the Load from Memory section.

EEPROM Timing Diagram

RESET

EEPROM

SCL

t1

t2

t3

Data Sheet

Symbol

Typical

Unit

2000

µs

t1

200

µs

t2

2

µs

t3

3

µs

t4

10

µs

t5

2

µs

SDA START

LOS_IRQ

b10001

ADDR

[1:0]

R/W ACK

REGISTER ADDR

ACK

DATA

Figure 4. Load from EEPROM Timing Diagram

ACK STOP

t5

t4

Rev. C | Page 8 of 76

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