ADP120(RevB) 데이터 시트보기 (PDF) - Analog Devices
부품명
상세내역
제조사
ADP120 Datasheet PDF : 20 Pages
| |||
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.3 V to +6 V
−0.3 V to VIN
−0.3 V to +6 V
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP120 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that TJ is within the specified temperature
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction-to-ambient
thermal resistance of the package (θJA).
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) using
the formula
TJ = TA + (PD × θJA)
ADP120
Junction-to-ambient thermal resistance (θJA) of the package
is based on modeling and calculation using a four-layer board.
The junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending on
PCB material, layout, and environmental conditions. The speci-
fied values of θJA are based on a four-layer, 4” × 3” PCB. Refer
to JESD 51-7 and JESD 51-9 for detailed information regarding
board construction. For additional information, see Application
Note AN-617, MicroCSPTM Wafer Level Chip Scale Package.
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a four-layer board. JESD51-12, Guidelines for
Reporting and Using Package Thermal Information, states that
thermal characterization parameters are not the same as ther-
mal resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation
from the package, factors that make ΨJB more useful in real-
world applications. Maximum junction temperature (TJ) is
calculated from the board temperature (TB) and power
dissipation (PD) using the following formula:
TJ = TB + (PD × ΨJB)
Refer to JESD51-8, JESD51-9, and JESD51-12 for more detailed
information about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
5-Lead TSOT
4-Ball, 0.4 mm Pitch WLCSP
θJA
ΨJB Unit
170 43 °C/W
260 58 °C/W
ESD CAUTION
Rev. B | Page 5 of 20
Share Link: 