ADP170 데이터 시트보기 (PDF) - Analog Devices

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ADP170

300 mA, Low Quiescent Current, CMOS Linear Regulators

Analog Devices 

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

VIN to GND

VOUT to GND

EN to GND

Storage Temperature Range

Operating Junction Temperature Range

Operating Ambient Temperature Range

Soldering Conditions

Rating

−0.3 V to +3.6 V

−0.3 V to VIN

−0.3 V to +3.6 V

−65°C to +150°C

−40°C to +125°C

−40°C to +85°C

JEDEC J-STD-020

Stresses above those listed under absolute maximum ratings

may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or

any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL DATA

Absolute maximum ratings apply only individually, not in

combination. The ADP170/ADP171 can be damaged when the

junction temperature limits are exceeded. Monitoring ambient

temperature does not guarantee that TJ is within the specified

temperature limits. In applications with high power dissipation

and poor thermal resistance, the maximum ambient temperature

may have to be derated.

In applications with moderate power dissipation and low PCB

thermal resistance, the maximum ambient temperature can

exceed the maximum limit as long as the junction temperature

is within specification limits. The junction temperature (TJ) of

the device is dependent on the ambient temperature (TA), the

power dissipation of the device (PD), and the junction-to-

ambient thermal resistance of the package (θJA).

Maximum junction temperature (TJ) is calculated from the

ambient temperature (TA) and power dissipation (PD) using the

following formula:

TJ = TA + (PD × θJA)

Junction-to-ambient thermal resistance (θJA) of the package is

based on modeling and calculation using a 4-layer board. The

junction-to-ambient thermal resistance is highly dependent on

the application and board layout. In applications where high

ADP170/ADP171

maximum power dissipation exists, close attention to thermal

board design is required. The value of θJA may vary, depending

on PCB material, layout, and environmental conditions. The

specified values of θJA are based on a 4-layer, 4 in. × 3 in. PCB.

Refer to JESD 51-7 for detailed information regarding board

construction.

ΨJB is the junction-to-board thermal characterization parameter

with units of °C/W. The ΨJB of the package is based on modeling

and calculation using a 4-layer board. The Guidelines for Reporting

and Using Electronic Package Thermal Information: JESD51-12

states that thermal characterization parameters are not the same

as thermal resistances. ΨJB measures the component power flowing

through multiple thermal paths rather than a single path as in

thermal resistance, θJB. Therefore, ΨJB thermal paths include

convection from the top of the package as well as radiation from

the package—factors that make ΨJB more useful in real-world

applications. Maximum junction temperature (TJ) is calculated

from the board temperature (TB) and power dissipation (PD)

using the formula

TJ = TB + (PD × ΨJB)

Refer to JESD51-8 and JESD51-12 for more detailed information

about ΨJB.

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is, a

device soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type

θJA

ΨJB

5-Lead TSOT

170

43

Unit

°C/W

ESD CAUTION

Rev. B | Page 5 of 20

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